Intel 253668-032US Benutzerhandbuch
Vol. 3 6-1
CHAPTER 6
INTERRUPT AND EXCEPTION HANDLING
This chapter describes the interrupt and exception-handling mechanism when oper-
ating in protected mode on an Intel 64 or IA-32 processor. Most of the information
provided here also applies to interrupt and exception mechanisms used in real-
address, virtual-8086 mode, and 64-bit mode.
Chapter 17, “8086 Emulation,” describes information specific to interrupt and excep-
tion mechanisms in real-address and virtual-8086 mode. Section 6.14, “Exception
and Interrupt Handling in 64-bit Mode,” describes information specific to interrupt
and exception mechanisms in IA-32e mode and 64-bit sub-mode.
ating in protected mode on an Intel 64 or IA-32 processor. Most of the information
provided here also applies to interrupt and exception mechanisms used in real-
address, virtual-8086 mode, and 64-bit mode.
Chapter 17, “8086 Emulation,” describes information specific to interrupt and excep-
tion mechanisms in real-address and virtual-8086 mode. Section 6.14, “Exception
and Interrupt Handling in 64-bit Mode,” describes information specific to interrupt
and exception mechanisms in IA-32e mode and 64-bit sub-mode.
6.1
INTERRUPT AND EXCEPTION OVERVIEW
Interrupts and exceptions are events that indicate that a condition exists somewhere
in the system, the processor, or within the currently executing program or task that
requires the attention of a processor. They typically result in a forced transfer of
execution from the currently running program or task to a special software routine or
task called an interrupt handler or an exception handler. The action taken by a
processor in response to an interrupt or exception is referred to as servicing or
handling the interrupt or exception.
Interrupts occur at random times during the execution of a program, in response to
signals from hardware. System hardware uses interrupts to handle events external
to the processor, such as requests to service peripheral devices. Software can also
generate interrupts by executing the INT n instruction.
Exceptions occur when the processor detects an error condition while executing an
instruction, such as division by zero. The processor detects a variety of error condi-
tions including protection violations, page faults, and internal machine faults. The
machine-check architecture of the Pentium 4, Intel Xeon, P6 family, and Pentium
processors also permits a machine-check exception to be generated when internal
hardware errors and bus errors are detected.
When an interrupt is received or an exception is detected, the currently running
procedure or task is suspended while the processor executes an interrupt or excep-
tion handler. When execution of the handler is complete, the processor resumes
execution of the interrupted procedure or task. The resumption of the interrupted
procedure or task happens without loss of program continuity, unless recovery from
an exception was not possible or an interrupt caused the currently running program
to be terminated.
This chapter describes the processor’s interrupt and exception-handling mechanism,
when operating in protected mode. A description of the exceptions and the conditions
that cause them to be generated is given at the end of this chapter.
in the system, the processor, or within the currently executing program or task that
requires the attention of a processor. They typically result in a forced transfer of
execution from the currently running program or task to a special software routine or
task called an interrupt handler or an exception handler. The action taken by a
processor in response to an interrupt or exception is referred to as servicing or
handling the interrupt or exception.
Interrupts occur at random times during the execution of a program, in response to
signals from hardware. System hardware uses interrupts to handle events external
to the processor, such as requests to service peripheral devices. Software can also
generate interrupts by executing the INT n instruction.
Exceptions occur when the processor detects an error condition while executing an
instruction, such as division by zero. The processor detects a variety of error condi-
tions including protection violations, page faults, and internal machine faults. The
machine-check architecture of the Pentium 4, Intel Xeon, P6 family, and Pentium
processors also permits a machine-check exception to be generated when internal
hardware errors and bus errors are detected.
When an interrupt is received or an exception is detected, the currently running
procedure or task is suspended while the processor executes an interrupt or excep-
tion handler. When execution of the handler is complete, the processor resumes
execution of the interrupted procedure or task. The resumption of the interrupted
procedure or task happens without loss of program continuity, unless recovery from
an exception was not possible or an interrupt caused the currently running program
to be terminated.
This chapter describes the processor’s interrupt and exception-handling mechanism,
when operating in protected mode. A description of the exceptions and the conditions
that cause them to be generated is given at the end of this chapter.