Intel 253668-032US Benutzerhandbuch
9-48 Vol. 3
PROCESSOR MANAGEMENT AND INITIALIZATION
9.11.7.1 Determining the Signature
An update that is successfully loaded into the processor provides a signature that
matches the update revision of the currently functioning revision. This signature is
available any time after the actual update has been loaded. Requesting the signature
does not have a negative impact upon a loaded update.
The procedure for determining this signature shown in Example 9-9.
matches the update revision of the currently functioning revision. This signature is
available any time after the actual update has been loaded. Requesting the signature
does not have a negative impact upon a loaded update.
The procedure for determining this signature shown in Example 9-9.
Example 9-9. Assembly Code to Retrieve the Update Revision
MOV
ECX, 08BH ;IA32_BIOS_SIGN_ID
XOR
EAX, EAX ;clear EAX
XOR
EDX, EDX ;clear EDX
WRMSR ;Load 0 to MSR at 8BH
MOV
EAX, 1
cpuid
MOV
ECX, 08BH ;IA32_BIOS_SIGN_ID
rdmsr ;Read Model Specific Register
If there is an update active in the processor, its revision is returned in the EDX
register after the RDMSR instruction executes.
register after the RDMSR instruction executes.
IA32_BIOS_SIGN_ID
Microcode Update Signature Register
MSR Address:
08BH Accessed as a Qword
Default Value:
XXXX XXXX XXXX XXXXh
Access:
Read/Write
The IA32_BIOS_SIGN_ID register is used to report the microcode update signature
when CPUID executes. The signature is returned in the upper DWORD (Table 9-11).
when CPUID executes. The signature is returned in the upper DWORD (Table 9-11).
9.11.7.2 Authenticating the Update
An update may be authenticated by the BIOS using the signature primitive,
described above, and the algorithm in Example 9-10.
described above, and the algorithm in Example 9-10.
Table 9-11. Microcode Update Signature
Bit
Description
63:32
Microcode update signature. This field contains the signature of the currently loaded
microcode update when read following the execution of the CPUID instruction, function
1. It is required that this register field be pre-loaded with zero prior to executing the
CPUID, function 1. If the field remains equal to zero, then there is no microcode update
loaded. Another non-zero value will be the signature.
31:0
Reserved.