Intel 253668-032US Benutzerhandbuch
11-42 Vol. 3
MEMORY CACHE CONTROL
the MTRRs according to known types of memory, including memory on devices that it
auto-configures. Initialization is expected to occur prior to booting the operating
system.
See Section 11.11.8, “MTRR Considerations in MP Systems,” for information on
initializing MTRRs in MP (multiple-processor) systems.
auto-configures. Initialization is expected to occur prior to booting the operating
system.
See Section 11.11.8, “MTRR Considerations in MP Systems,” for information on
initializing MTRRs in MP (multiple-processor) systems.
11.11.6 Remapping Memory Types
A system designer may re-map memory types to tune performance or because a
future processor may not implement all memory types supported by the Pentium 4,
Intel Xeon, and P6 family processors. The following rules support coherent memory-
type re-mappings:
1. A memory type should not be mapped into another memory type that has a
future processor may not implement all memory types supported by the Pentium 4,
Intel Xeon, and P6 family processors. The following rules support coherent memory-
type re-mappings:
1. A memory type should not be mapped into another memory type that has a
weaker memory ordering model. For example, the uncacheable type cannot be
mapped into any other type, and the write-back, write-through, and write-
protected types cannot be mapped into the weakly ordered write-combining
type.
mapped into any other type, and the write-back, write-through, and write-
protected types cannot be mapped into the weakly ordered write-combining
type.
2. A memory type that does not delay writes should not be mapped into a memory
type that does delay writes, because applications of such a memory type may
rely on its write-through behavior. Accordingly, the write-back type cannot be
mapped into the write-through type.
rely on its write-through behavior. Accordingly, the write-back type cannot be
mapped into the write-through type.
3. A memory type that views write data as not necessarily stored and read back by
a subsequent read, such as the write-protected type, can only be mapped to
another type with the same behaviour (and there are no others for the
Pentium 4, Intel Xeon, and P6 family processors) or to the uncacheable type.
another type with the same behaviour (and there are no others for the
Pentium 4, Intel Xeon, and P6 family processors) or to the uncacheable type.
In many specific cases, a system designer can have additional information about how
a memory type is used, allowing additional mappings. For example, write-through
memory with no associated write side effects can be mapped into write-back
memory.
a memory type is used, allowing additional mappings. For example, write-through
memory with no associated write side effects can be mapped into write-back
memory.
11.11.7 MTRR Maintenance Programming Interface
The operating system maintains the MTRRs after booting and sets up or changes the
memory types for memory-mapped devices. The operating system should provide a
driver and application programming interface (API) to access and set the MTRRs. The
function calls MemTypeGet() and MemTypeSet() define this interface.
memory types for memory-mapped devices. The operating system should provide a
driver and application programming interface (API) to access and set the MTRRs. The
function calls MemTypeGet() and MemTypeSet() define this interface.
11.11.7.1 MemTypeGet() Function
The MemTypeGet() function returns the memory type of the physical memory range
specified by the parameters base and size. The base address is the starting physical
address and the size is the number of bytes for the memory range. The function
specified by the parameters base and size. The base address is the starting physical
address and the size is the number of bytes for the memory range. The function