Intel 253668-032US Benutzerhandbuch

Vol. 3 17-19

8086 EMULATION

save and restore these registers regardless of the type segment selectors they
contain (protected-mode or 8086-style). The interrupt and exception handlers,
which may be called in the context of either a protected-mode task or a virtual-
8086-mode task, can use the same code sequences for saving and restoring the
registers for any task. Clearing these registers before execution of the IRET
instruction does not cause a trap in the interrupt handler. Interrupt procedures
that expect values in the segment registers or that return values in the segment
registers must use the register images saved on the stack for privilege level 0.

4. Clears VM, NT, RF and TF flags (in the EFLAGS register). If the gate is an interrupt

gate, clears the IF flag.

5. Begins executing the selected interrupt or exception handler.
If the trap or interrupt gate references a procedure in a conforming segment or in a
segment at a privilege level other than 0, the processor generates a general-protec-
tion exception (#GP). Here, the error code is the segment selector of the code
segment to which a call was attempted.

Figure 17-4. Privilege Level 0 Stack After Interrupt or

Exception in Virtual-8086 Mode

Unused

Old GS

Old ESP

With Error Code

ESP from

Old FS

Old DS

Old ES

Old SS

Old EFLAGS

Old CS

Old EIP

Error Code

New ESP

TSS