Renesas R5S72640 Benutzerhandbuch
Section 26 USB 2.0 Host/Function Module
R01UH0134EJ0400 Rev. 4.00
Page 1381 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
12 DVSE
0
R/W
Device
State
Transition Interrupt Enable*
Enables or disables the USB interrupt request when
the DVST interrupt is detected.
the DVST interrupt is detected.
0: Interrupt request disabled
1: Interrupt request enabled
11 CTRE
0
R/W
Control
Transfer
Stage Transition Interrupt Enable*
Enables or disables the USB interrupt request when
the CTRT interrupt is detected.
the CTRT interrupt is detected.
0: Interrupt request disabled
1: Interrupt request enabled
10
BEMPE
0
R/W
Buffer Empty Interrupt Enable
Enables or disables the USB interrupt request when
the BEMP interrupt is detected.
the BEMP interrupt is detected.
0: Interrupt request disabled
1: Interrupt request enabled
9
NRDYE
0
R/W
Buffer Not Ready Response Interrupt Enable
Enables or disables the USB interrupt request when
the NRDY interrupt is detected.
the NRDY interrupt is detected.
0: Interrupt request disabled
1: Interrupt request enabled
8
BRDYE
0
R/W
Buffer Ready Interrupt Enable
Enables or disables the USB interrupt request when
the BRDY interrupt is detected.
the BRDY interrupt is detected.
0: Interrupt request disabled
1: Interrupt request enabled
7 to 0
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
Note: * The RSME, DVSE, and CTRE bits can be set to 1 only when the function controller
function is selected; do not set these bits to 1 to enable the corresponding interrupt
output when the host controller function is selected.
output when the host controller function is selected.