Renesas R5S72646 Benutzerhandbuch
Section 7 Interrupt Controller
Page 178 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Table 7.4
Interrupt Exception Handling Vectors and Priorities
Interrupt Source
Interrupt Vector
Interrupt
Priority
(Initial Value)
Priority
(Initial Value)
Corresponding
IPR (Bit)
IPR (Bit)
IPR
Setting
Unit
Internal
Priority
Setting
Unit
Internal
Priority
Default
Priority
Priority
Vector
Vector Table
Address Offset
Address Offset
NMI 11
H'0000002C
to
H'0000002F
16
High
User debug interface
14
H'00000038 to
H'0000003B
H'0000003B
15
IRQ IRQ0
64
H'00000100
to
H'00000103
0 to 15 (0)
IPR01 (15 to 12)
IRQ1 65
H'00000104
to
H'00000107
0 to 15 (0)
IPR01 (11 to 8)
IRQ2 66
H'00000108
to
H'0000010B
0 to 15 (0)
IPR01 (7 to 4)
IRQ3 67
H'0000010C
to
H'0000010F
0 to 15 (0)
IPR01 (3 to 0)
IRQ4 68
H'00000110
to
H'00000113
0 to 15 (0)
IPR02 (15 to 12)
IRQ5 69
H'00000114
to
H'00000117
0 to 15 (0)
IPR02 (11 to 8)
IRQ6 70
H'00000118
to
H'0000011B
0 to 15 (0)
IPR02 (7 to 4)
IRQ7 71
H'0000011C
to
H'0000011F
0 to 15 (0)
IPR02 (3 to 0)
PINT PINT0
80
H'00000140
to
H'00000143
0 to 15 (0)
IPR05 (15 to 12)
1
PINT1 81
H'00000144
to
H'00000147
2
PINT2 82
H'00000148
to
H'0000014B
3
PINT3 83
H'0000014C
to
H'0000014F
4
PINT4
84
H'00000150
to
H'00000153
5
Low