Intel Xeon X3460 BX80605X3460 Benutzerhandbuch

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Intel® Xeon® Processor 3400 Series Datasheet, Volume 2

 summarizes IIO behavior on inbound memory transactions from any PCIe 

port. Note that this table is only intended to show the routing of transactions based on 
the address and is not intended to show the details of several control bits that govern 
forwarding of memory requests from a given PCI Express port. Refer to the PCI Express 
Base Specification 2.0 and the registers chapter for details of these control bits.

DRAM

Address in Intel ME range in DRAM, class TCm 

over DMI

Forward to Intel QuickPath 

Interconnect

Address in Intel ME range in DRAM, not class 

TCm over DMI

Master Abort

Address outside Intel ME range in DRAM, 

class TCm over DMI

Master Abort

Address in Intel ME range in DRAM and any 

class over PCIE

Master Abort

Address within 0:TOLM or 4 GB:TOHM and 

SAD hit

Forward to Intel QuickPath 

Interconnect

Interrupts

Address within FEE00000h–FEEFFFFFh and 

write

Forward to Intel QuickPath 

Interconnect

Address within FEE00000h–FEEFFFFFh and 

read

UR Response

TPM/HPET, I/OxAPIC, 

CPUCSR when enabled, 

CPULocalCSR, 

privileged 

CSR,INTA/Rsvd, TSEG, 

Relocated CSeg, On-die 

ROM, FWH, VTBAR

1

 

(when enabled), 

Protected VT-d range 

Low and High, Generic 

Protected dram range, 

CB DMA and I/OxAPIC 

BARs

2

• FC00000h–FEDFFFFFh or FEF00000h–

FFFFFFFFh

• VTBAR
• VT-d_Prot_High
• VT-d_Prot_Low
• Generic_Prot_DRAM
• CB DMA BAR
• I/OxAPIC ABAR and MBAR

Completer Abort

VGA

3

Address within 0A0000h–0BFFFFh and main 

switch SAD is programmed to forward VGA

Forward to Intel QuickPath 

Interconnect

Address within 0A0000h–0BFFFFh and main 

switch SAD is NOT programmed to forward 

VGA and one of the PCIe has VGAEN bit set

Forward to the PCIe port

Address within 0A0000h–0BFFFFh and main 

switch SAD is NOT programmed to forward 

VGA and none of the PCIe has VGAEN bit set 

and DMI port is the subtractive decoding port

Forward to DMI

Address within 0A0000h–0BFFFFh and main 

switch SAD is NOT programmed to forward 

VGA and none of the PCIe ports have VGAEN 

bit set and DMI is not the subtractive decode 

port

Master abort