Intel X5677 AT80614005145AB Benutzerhandbuch
Produktcode
AT80614005145AB
Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 1
5
Figures
VCC Static and Transient Tolerance Loadlines1,2,3,4.............................................. 35
2-10 VTT Static and Transient Tolerance Loadlines ........................................................ 40
2-11 Intel QuickPath Interconnect Electrical Test Setup for Validating
2-11 Intel QuickPath Interconnect Electrical Test Setup for Validating
Standalone TX Voltage and Timing Parameters...................................................... 54
2-13 Distribution Profile of Common Mode Noise for Either Tx or Rx................................. 55
2-14 Distribution Profile of UI-UI Jitter and Accumulated Jitter ........................................ 56
2-15 Eye Mask at the End of Tx + Channel................................................................... 56
2-16 Differential Clock Crosspoint Specification............................................................. 57
2-17 Differential Clock Measurement Points for Duty Cycle and Period ............................. 57
2-18 Differential Clock Measurement Points for Rise and Fall time ................................... 57
2-19 Single-Ended Clock Measurement Points for Absolute Cross Point and Swing ............. 58
2-20 Single-Ended Clock Measurement Points for Delta Cross Point ................................. 58
2-21 Differential Clock Measurement Point for Ringback ................................................. 58
2-22 DDR3 Command / Control and Clock Timing Waveform .......................................... 59
2-23 DDR3 Clock to Output Timing Waveform .............................................................. 59
2-24 DDR3 Clock to DQS Skew Timing Waveform ......................................................... 60
2-25 TAP Valid Delay Timing Waveform ....................................................................... 60
2-26 Test Reset (TRST#), Asynch GTL Input, and PROCHOT# Timing Waveform ............... 61
2-27 THERMTRIP# Power Down Sequence ................................................................... 61
2-28 Voltage Sequence Timing Requirements ............................................................... 62
2-29 VID Step Times and Vcc Waveforms .................................................................... 63
3-1
2-14 Distribution Profile of UI-UI Jitter and Accumulated Jitter ........................................ 56
2-15 Eye Mask at the End of Tx + Channel................................................................... 56
2-16 Differential Clock Crosspoint Specification............................................................. 57
2-17 Differential Clock Measurement Points for Duty Cycle and Period ............................. 57
2-18 Differential Clock Measurement Points for Rise and Fall time ................................... 57
2-19 Single-Ended Clock Measurement Points for Absolute Cross Point and Swing ............. 58
2-20 Single-Ended Clock Measurement Points for Delta Cross Point ................................. 58
2-21 Differential Clock Measurement Point for Ringback ................................................. 58
2-22 DDR3 Command / Control and Clock Timing Waveform .......................................... 59
2-23 DDR3 Clock to Output Timing Waveform .............................................................. 59
2-24 DDR3 Clock to DQS Skew Timing Waveform ......................................................... 60
2-25 TAP Valid Delay Timing Waveform ....................................................................... 60
2-26 Test Reset (TRST#), Asynch GTL Input, and PROCHOT# Timing Waveform ............... 61
2-27 THERMTRIP# Power Down Sequence ................................................................... 61
2-28 Voltage Sequence Timing Requirements ............................................................... 62
2-29 VID Step Times and Vcc Waveforms .................................................................... 63
3-1
7-10 LV-40W Processor Dual Thermal Profile .............................................................. 127
7-11 Case Temperature (TCASE) Measurement Location .............................................. 128
7-12 Frequency and Voltage Ordering........................................................................ 130
7-13 Ping() ............................................................................................................ 134
7-14 Ping() Example ............................................................................................... 134
7-11 Case Temperature (TCASE) Measurement Location .............................................. 128
7-12 Frequency and Voltage Ordering........................................................................ 130
7-13 Ping() ............................................................................................................ 134
7-14 Ping() Example ............................................................................................... 134