Cisco Cisco ONS 15454 SDH Multiservice Provisioning Platform (MSPP)
3
Release Notes for Cisco ONS 15454 SDH Release 6.0.3
OL-13075-01
Caveats
CSCea78210
The TXP_MR_2.5G and TXPP_MR_2.5G cards do not support TX Optical power performance
monitoring on the trunk port. To see this, go to the Optics Performance Monitoring tab of the
TXP_MR_2.5G or TXPP_MR_2.5G card, and select the trunk port. TX Optical Pwr is not shown. This
is as designed.
monitoring on the trunk port. To see this, go to the Optics Performance Monitoring tab of the
TXP_MR_2.5G or TXPP_MR_2.5G card, and select the trunk port. TX Optical Pwr is not shown. This
is as designed.
CSCdw92634
SDH DS3-I and E3 electrical cards only support a VC4 J1 trace string setting for all VC4s together. You
cannot set the J1 byte for individual VC4s. This issue is a limitation of hardware.
cannot set the J1 byte for individual VC4s. This issue is a limitation of hardware.
Note
VC3 J1 strings can be set individually, but the optical cards cannot monitor the VC3 J1 string.
CSCdw14501
Interconnection Equipment failure alarms may be generated at 55 degrees C, and 72 volts. When the
operating environment is at 55 degrees C and 72 volts, interconnection equipment failure alarms for the
following cards can occur:
operating environment is at 55 degrees C and 72 volts, interconnection equipment failure alarms for the
following cards can occur:
•
STM16SH
•
STM64LH
•
STM16LH
The alarms could potentially occur on any of these boards, as well: OC48AS, GigE, OC192 or
OC192LR. This issue will not be resolved.
OC192LR. This issue will not be resolved.
CSCdw50903
E1-14 boards with second source components can incur bit errors under extreme environmental
conditions. When these boards operate under voltage and temperature stress conditions and a
temperature ramp rate of 1 degree per minute, the boards could exhibit dribbling bit errors at high
temperatures: BER = 5.5e-6. To avoid this, you must apply the temperature ramp rate at 0.5 degree per
minute. This ramp rate complies with the NEBS standard; however, this issue will be revisited in a future
release.
conditions. When these boards operate under voltage and temperature stress conditions and a
temperature ramp rate of 1 degree per minute, the boards could exhibit dribbling bit errors at high
temperatures: BER = 5.5e-6. To avoid this, you must apply the temperature ramp rate at 0.5 degree per
minute. This ramp rate complies with the NEBS standard; however, this issue will be revisited in a future
release.
Upgrades
CSCec42769 Database Corruption with ONS 15454 SDH Release 4.0, 4.0.1, 4.1
Caution
Before you upgrade to Release 6.x from Release 4.0, 4.0.1, or 4.1, you must read this caveat and run the
SDH Circuit Repair Utility (VcCheck) provided on the software CD (also available on CCO).
SDH Circuit Repair Utility (VcCheck) provided on the software CD (also available on CCO).
The XCVXL card on the ONS 15454 SDH allows the intermixing of VC12 and VC3 payloads within a
single VC4. When a VC4 contains only one VC12 tributary and at least one VC3 tributary and the VC12
is deleted, the database becomes corrupt.
single VC4. When a VC4 contains only one VC12 tributary and at least one VC3 tributary and the VC12
is deleted, the database becomes corrupt.