SEA Inc of Delaware SEA245 Benutzerhandbuch
ta8man.doc
Page 5-3
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5.2.1 BLOCK DIAGRAM
Figure 5.2.1 shows the block diagram of the receive mode. The received RF signal
is routed from the rear panel antenna jack to a low pass filter selected by a relay
bank on the PA/Filter Assembly (ASY-0245-02). The output of the filter is routed
from J4 on the PA/Filter Assembly through a coaxial cable to the receiver input
circuitry on the Mainboard Assembly (ASY-0245-01). The signal is further
bandpass filtered to reject interfering signals and input to the RF
preamplifier/attenuator, Q2. In the "on" state, the amplifier provides some 3-4 dB of
low-noise preamplifier gain. In the "off" state, the stage becomes an attenuator that
provides approximately 10 dB of signal attenuation. The use of this switched gain
stage improves the weak signal sensitivity of the receiver and provides a front-end
attenuator that is used to insure that large signals do not swamp the ADC in the DSP
engine. The preamplifier/attenuator stage output is routed to the first mixer and the
signal is upconverted to the first IF at 45 MHz.
The 45 MHz IF signal passes through a low noise MMIC gain stage to a 4-pole
crystal "topping" filter with approximately 8 kHz bandwidth, a second MMIC
amplifier stage and a second two-pole crystal filter into the second mixer. In the
second mixer the signal is combined with the second Local Oscillator frequency of
45040 kHz. The mixer output signal is buffered by low-noise amplifier U3,
converted to a push-pull signal by U5 and then applied to the input of the A/D
converter U34. U34 digitizes the signal and passes it to the DSP engine, which
provides all baseband filtering, fine-tuning, demodulation and AGC functions. The
audio signal is converted to balanced format for transmission over the SEABUSS
audio lines to the Front Panel/Controller board (ASY-0245-03). The Controller
provides squelch processing, volume control and a speaker amplifier.
is routed from the rear panel antenna jack to a low pass filter selected by a relay
bank on the PA/Filter Assembly (ASY-0245-02). The output of the filter is routed
from J4 on the PA/Filter Assembly through a coaxial cable to the receiver input
circuitry on the Mainboard Assembly (ASY-0245-01). The signal is further
bandpass filtered to reject interfering signals and input to the RF
preamplifier/attenuator, Q2. In the "on" state, the amplifier provides some 3-4 dB of
low-noise preamplifier gain. In the "off" state, the stage becomes an attenuator that
provides approximately 10 dB of signal attenuation. The use of this switched gain
stage improves the weak signal sensitivity of the receiver and provides a front-end
attenuator that is used to insure that large signals do not swamp the ADC in the DSP
engine. The preamplifier/attenuator stage output is routed to the first mixer and the
signal is upconverted to the first IF at 45 MHz.
The 45 MHz IF signal passes through a low noise MMIC gain stage to a 4-pole
crystal "topping" filter with approximately 8 kHz bandwidth, a second MMIC
amplifier stage and a second two-pole crystal filter into the second mixer. In the
second mixer the signal is combined with the second Local Oscillator frequency of
45040 kHz. The mixer output signal is buffered by low-noise amplifier U3,
converted to a push-pull signal by U5 and then applied to the input of the A/D
converter U34. U34 digitizes the signal and passes it to the DSP engine, which
provides all baseband filtering, fine-tuning, demodulation and AGC functions. The
audio signal is converted to balanced format for transmission over the SEABUSS
audio lines to the Front Panel/Controller board (ASY-0245-03). The Controller
provides squelch processing, volume control and a speaker amplifier.
5.2.2 RECEIVE RF CIRCUITRY AND FIRST MIXER
As previously discussed, an incoming signal is first passed through some shared
circuitry on the PA/Filter Board (ASY-0245-02). This consists of a bandswitched
array of low pass filters, a T/R relay and a PIN diode signal limiter which prevents
damage to receiver input circuitry in the presence of extremely large signals. The
received signal is then sent through a coaxial cable to the receiver input on the
Mainboard Assembly (ASY-0245-01). On the Mainboard, a high-pass filter
consisting of C1, L1 and C7 further filters the signal.
Diode CR1 is forward biased in the receive mode from the +12VRX rail and
reversed biased in the transmit mode from the +12VTX rail through CR2. This T/R
switching circuitry provides extra isolation between the low-level transmitter signal
and any signal leakage through the PA/Filter Board T/R switches. From CR1, the
received signal passes through a low-pass filter (C5, L2 and C6) to the
preamplifier/attenuator stage. This stage is a low noise, low gain (+4 dB) broadband
common-gate JFET amplifier. A gain step is provided by switching the
preamplifier supply voltage on and off through Q6. When Q6 is OFF, the stage
circuitry on the PA/Filter Board (ASY-0245-02). This consists of a bandswitched
array of low pass filters, a T/R relay and a PIN diode signal limiter which prevents
damage to receiver input circuitry in the presence of extremely large signals. The
received signal is then sent through a coaxial cable to the receiver input on the
Mainboard Assembly (ASY-0245-01). On the Mainboard, a high-pass filter
consisting of C1, L1 and C7 further filters the signal.
Diode CR1 is forward biased in the receive mode from the +12VRX rail and
reversed biased in the transmit mode from the +12VTX rail through CR2. This T/R
switching circuitry provides extra isolation between the low-level transmitter signal
and any signal leakage through the PA/Filter Board T/R switches. From CR1, the
received signal passes through a low-pass filter (C5, L2 and C6) to the
preamplifier/attenuator stage. This stage is a low noise, low gain (+4 dB) broadband
common-gate JFET amplifier. A gain step is provided by switching the
preamplifier supply voltage on and off through Q6. When Q6 is OFF, the stage