Intel i7-2700K BX80623I72700K Benutzerhandbuch
Produktcode
BX80623I72700K
Datasheet, Volume 1
7
7-2 VCCSA_VID configuration ........................................................................................ 76
7-3 Signal Groups 1 ...................................................................................................... 77
7-4 Storage Condition Ratings........................................................................................ 79
7-5 Processor Core Active and Idle Mode DC Voltage and Current Specifications.................... 80
7-6 Processor System Agent I/O Buffer Supply DC Voltage and Current Specifications ........... 81
7-7 Processor Graphics VID based (V
7-3 Signal Groups 1 ...................................................................................................... 77
7-4 Storage Condition Ratings........................................................................................ 79
7-5 Processor Core Active and Idle Mode DC Voltage and Current Specifications.................... 80
7-6 Processor System Agent I/O Buffer Supply DC Voltage and Current Specifications ........... 81
7-7 Processor Graphics VID based (V
AXG
) Supply DC Voltage and Current Specifications ........ 83
7-8 DDR3 Signal Group DC Specifications ........................................................................ 83
7-9 Control Sideband and TAP Signal Group DC Specifications ............................................ 85
7-10 PCIe* DC Specifications ........................................................................................... 85
7-11 PECI DC Electrical Limits .......................................................................................... 87
8-1 Processor Pin List by Pin Name ................................................................................. 94
9-1 DDR Data Swizzling Table – Channel A .................................................................... 110
9-2 DDR Data Swizzling Table – Channel B .................................................................... 111
7-9 Control Sideband and TAP Signal Group DC Specifications ............................................ 85
7-10 PCIe* DC Specifications ........................................................................................... 85
7-11 PECI DC Electrical Limits .......................................................................................... 87
8-1 Processor Pin List by Pin Name ................................................................................. 94
9-1 DDR Data Swizzling Table – Channel A .................................................................... 110
9-2 DDR Data Swizzling Table – Channel B .................................................................... 111