Hynix 8GB DDR3 PC3-10600 HMT41GU7MFR8C-H9 Benutzerhandbuch
Produktcode
HMT41GU7MFR8C-H9
Rev. 1.0 / Jul. 2012
20
Differential swing requirements for clock (CK - CK) and strobe (DQS-DQS)
Notes:
1. Used to define a differential signal slew-rate.
2. For CK - CK use VIH/VIL (ac) of AADD/CMD and VREFCA; for DQS - DQS, DQSL, DQSL, DQSU, DQSU use VIH/VIL
2. For CK - CK use VIH/VIL (ac) of AADD/CMD and VREFCA; for DQS - DQS, DQSL, DQSL, DQSU, DQSU use VIH/VIL
(ac) of DQs and VREFDQ; if a reduced ac-high or ac-low levels is used for a signal group, then the reduced level
applies also here.
applies also here.
3. These values are not defined; however, the single-ended signals Ck, CK, DQS, DQS, DQSL, DQSL, DQSU, DQSU
need to be within the respective limits (VIH (dc) max, VIL (dc) min) for single-ended signals as well as the limita-
tions for overshoot and undershoot.
tions for overshoot and undershoot.
note : Rising input differential signal shall become equal to or greater than VIHdiff(ac) level and Falling
input differential signal shall become equal to or less than VIL(ac) level.
Differential AC and DC Input Levels
Symbol
Parameter
DDR3-800, 1066, 1333, 1600 & 1866
Unit Notes
Min
Max
V
IHdiff
Differential input high
+ 0.200
Note 3
V
1
V
ILdiff
Differential input logic low
Note 3
- 0.200
V
1
V
IHdiff (ac)
Differential input high ac
2 x (VIH (ac) - Vref)
Note 3
V
2
V
ILdiff (ac)
Differential input low ac
Note 3
2 x (VIL (ac) - Vref)
V
2
Allowed time before ringback
(tDVAC) for CK - CK and DQS - DQS
DDR3-800/1066/1333/1600
DDR3-1866
Slew Rate
[V/ns]
tDVAC [ps]
@ VIH/Ldiff (ac)
= 350mV
tDVAC [ps]
@ VIH/Ldiff (ac)
= 300mV
tDVAC [ps]
@ VIH/Ldiff (ac)
= 270mV
(DQS-DQS)only
(Optional)
tDVAC [ps]
@ VIH/Ldiff (ac|
= 270mV
min
max
min
max
min
max
min
max
> 4.0
75
-
175
-
214
-
134
-
4.0
57
-
170
-
214
-
134
-
3.0
50
-
167
-
191
-
112
-
2.0
38
-
119
146
67
1.8
34
-
102
-
131
-
52
-
1.6
29
-
81
-
113
-
33
-
1.4
22
-
54
-
88
-
9
-
1.2
13
-
19
-
56
-
note
-
1.0
0
-
note
-
11
-
note
-
< 1.0
0
-
note
-
note
-
note
-