Intel 1005M AW8063801121200 Benutzerhandbuch
Produktcode
AW8063801121200
Datasheet, Volume 1
49
Technologies
3.9
Power Aware Interrupt Routing (PAIR)
The processor added enhanced power-performance technology which routes interrupts
to threads or cores based on their sleep states. For example concerning energy
savings, it routes the interrupt to the active cores without waking the deep idle cores.
For Performance, it routes the interrupt to the idle (C1) cores without interrupting the
already heavily loaded cores. This enhancement is mostly beneficial for high interrupt
scenarios like Gigabit LAN, WLAN peripherals, and so on.
to threads or cores based on their sleep states. For example concerning energy
savings, it routes the interrupt to the active cores without waking the deep idle cores.
For Performance, it routes the interrupt to the idle (C1) cores without interrupting the
already heavily loaded cores. This enhancement is mostly beneficial for high interrupt
scenarios like Gigabit LAN, WLAN peripherals, and so on.
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