Intel E7-8891 v2 CM8063601377422 Benutzerhandbuch

Produktcode
CM8063601377422
Seite von 504
Integrated I/O (IIO) Configuration Registers
404
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.7.4
VTD[0:1]_GLBCMD
Intel
®
VT-d Global Command.
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x18, 0x1018
Bit
Attr
Default
Description
31:31
RW
0x0
translation_enable:
Software writes to this field to request hardware to enable/disable DMA-
remapping hardware.0: Disable DMA-remapping hardware
1: Enable DMA-remapping hardware
Hardware reports the status of the translation enable operation through the 
TES field in the Global Status register. Before enabling (or reenabling) DMA-
remapping hardware through this field, software must:
- Setup the DMA-remapping structures in memory
- Flush the write buffers (through WBF field), if write buffer flushing is 
reported as required.
- Set the root-entry table pointer in hardware (through SRTP field).
- Perform global invalidation of the context-cache and global invalidation of 
IOTLB
- If advanced fault logging supported, setup fault log pointer (through SFL 
field) and enable advanced fault logging (through EAFL field).
There may be active DMA requests in the platform when software updates 
this field. Hardware must enable or disable remapping logic only at 
deterministic transaction boundaries, so that any in-flight transaction is 
either subject to remapping or not at all. 
30:30
RW_V
0x0
set_root_table_pointer:
Software sets this field to set/update the root-entry table pointer used by 
hardware. The root-entry table pointer is specified through the Root-entry 
Table Address register.Hardware reports the status of the root table pointer 
set operation through the RTPS field in the Global Status register. The root 
table pointer set operation must be performed before enabling or reenabling 
(after disabling) DMA remapping hardware.
After a root table pointer set operation, software must globally invalidate the 
context cache followed by global invalidate of IOTLB. This is required to 
ensure hardware uses only the remapping structures referenced by the new 
root table pointer, and not any stale cached entries. While DMA-remapping 
hardware is active, software may update the root table pointer through this 
field. However, to ensure valid in-flight DMA requests are deterministically 
remapped, software must ensure that the structures referenced by the new 
root table pointer are programmed to provide the same remapping results 
as the structures referenced by the previous root table pointer.
Clearing this bit has no effect.
29:29
RO
0x0
set_fault_log_pointer:
N/A to processor.
28:28
RO
0x0
enable_advanced_fault_logging:
N/A to processor.
27:27
RO
0x0
write_buffer_flush:
N/A to processor.