Intel E7-8850 v2 CM8063601272306 Benutzerhandbuch
Produktcode
CM8063601272306
PCU Functional Description
68
Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
many operating conditions under which one or more cores in the processor would be
capable of running at much higher frequency without exceeding the power related
constraints for the part. Furthermore, there are cases that the processor could exceed
its rated power without exceeding the cooling capability of the platform, for significant
duration or infinitely.
capable of running at much higher frequency without exceeding the power related
constraints for the part. Furthermore, there are cases that the processor could exceed
its rated power without exceeding the cooling capability of the platform, for significant
duration or infinitely.
10.6
DDR3 Power and Thermal Management
10.6.1
DRAM Power Management
The memory power meter uses Voltage Regulator (VR) current readings and/or
activity counters to provide a running estimate of DRAM subsystem power.
activity counters to provide a running estimate of DRAM subsystem power.
10.6.2
DRAM Thermal Throttling
10.6.2.1
Motivation
The iMC module should estimate or sense the temperature of the DDR3 chips for two
purposes. First is to tune the refresh rate to the temperature. Second reason is for
thermal throttling. The system should use the best possible mean to sense the
temperature.
purposes. First is to tune the refresh rate to the temperature. Second reason is for
thermal throttling. The system should use the best possible mean to sense the
temperature.
10.7
Miscellaneous Functions
PCU performs many functions which are not directly related to power and thermal
management. Some of examples are:
management. Some of examples are:
• Socket Reset Flow: A significant portion of the socket reset flow is controlled
by PCU
• Always ON APIC Timer: This function provides better support for Tickless OS. When
cores are sleeping, PCU still keeps track of their APIC timers values and wakes the
core up when necessary
core up when necessary
• DRAM Throttling: PCU participates in DRAM thermal throttling solution. By taking
advantage of PCU microcode, it is feasible to better model the temperature of
DRAMs and reduce guardbands in open loop thermal throttling
DRAMs and reduce guardbands in open loop thermal throttling
• Manageability Support: PCU is the master of PECI interface which also carries
processor manageability functions. PCU supports manageability functions which
allow external BMC to read status information periodically (MSRs, CSRs, Error
register, and so forth)
allow external BMC to read status information periodically (MSRs, CSRs, Error
register, and so forth)
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