Crucial Micron M500DC 800GB 2.5" MTFDDAK800MBB1AE1ZAB Benutzerhandbuch

Produktcode

MTFDDAK800MBB1AE1ZAB

Table 5: Identify Device (Continued)

See Note 1 for setting definitions

Word

Bit(s)

Setting

Default Value

Description

–

Serial ATA capabilities

1 = Supports READ LOG DMA EXT as equivalent to READ LOG
EXT

Reserved

1 = Supports host automatic partial to slumber transitions

Native command queuing priority information is supported

Unload while NCQ commands are outstanding is supported

Physical event counters are supported

Receipt of host-initiated interface power management requests
is supported

Native command queuing is supported

7–4

0000b

Reserved for future Serial ATA signaling speed grades

1 = Serial ATA Gen-3 speed (6.0 Gb/s) is supported

1 = Serial ATA Gen-2 speed (3.0 Gb/s) is supported

1 = Serial ATA Gen-1 speed (1.5 Gb/s) is supported

Reserved (set to 0)

–

Serial ATA additional capabilities

15–7

000000000b

Reserved for future Serial ATA definition

1 = Supports RECEIVE FPDMA QUEUED and SEND FPDMA
QUEUED commands

NCQ QUEUE MANAGEMENT command is supported

NCQ streaming is supported

3–1

011b

Coded value indicating current negotiated Serial ATA signal
speed

Shall be cleared to zero

–

Serial ATA features are supported

15–7

000000000b

Reserved

1 = Supports software settings preservation

Reserved

1 = In-order data delivery is supported

1 = Dev initiate interface power management is supported

1 = DMA setup auto-activate optimization is supported

1 = Non-zero buffer offsets in DMA setup FIS are supported

Reserved (set to 0)

M500DC 2.5-Inch NAND Flash SSD

Device ID

PDF: 09005aef854b6757
M500DC_2_5_disti.pdf - Rev. D 4/14 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.