Acer Intel Celeron G530 KC.53001.CDG Benutzerhandbuch
Produktcode
KC.53001.CDG
Intel
®
Celeron
®
Processor on 0.13 Micron Process in the 478-Pin Package Datasheet
101
Debug Tools Specifications
Debug Tools Specifications
9
Refer to the ITP700 Debug Port Design Guide and the appropriate Platform Design Guide for
more detailed information regarding debug tools specifications.
more detailed information regarding debug tools specifications.
9.1
Logic Analyzer Interface (LAI)
Intel is working with two logic analyzer vendors to provide logic analyzer interfaces (LAIs) for use
in debugging Celeron processor on 0.13 micron process systems. Tektronix and Agilent should be
contacted to get specific information about their logic analyzer interfaces. The following
information is general in nature. Specific information must be obtained from the logic analyzer
vendor.
in debugging Celeron processor on 0.13 micron process systems. Tektronix and Agilent should be
contacted to get specific information about their logic analyzer interfaces. The following
information is general in nature. Specific information must be obtained from the logic analyzer
vendor.
Because of the complexity of Celeron processor on 0.13 micron process systems, the LAI is critical
in providing the ability to probe and capture system bus signals. There are two sets of
considerations to keep in mind when designing a Celeron processor on 0.13 micron process system
that can make use of an LAI: mechanical and electrical.
in providing the ability to probe and capture system bus signals. There are two sets of
considerations to keep in mind when designing a Celeron processor on 0.13 micron process system
that can make use of an LAI: mechanical and electrical.
9.1.1
Mechanical Considerations
The LAI is installed between the processor socket and the processor. The LAI pins plug into the
socket, while the processor pins plug into a socket on the LAI. Cabling that is part of the LAI
egresses the system to allow an electrical connection between the processor and a logic analyzer.
The maximum volume occupied by the LAI, known as the keep-out volume, as well as the cable
egress restrictions, should be obtained from the logic analyzer vendor. System designers must
make sure that the keep-out volume remains unobstructed inside the system. Note that it is possible
that the keep-out volume reserved for the LAI may differ from the space normally occupied by the
Celeron processor on 0.13 micron process heatsink. If this is the case, the logic analyzer vendor
will provide a cooling solution as part of the LAI.
socket, while the processor pins plug into a socket on the LAI. Cabling that is part of the LAI
egresses the system to allow an electrical connection between the processor and a logic analyzer.
The maximum volume occupied by the LAI, known as the keep-out volume, as well as the cable
egress restrictions, should be obtained from the logic analyzer vendor. System designers must
make sure that the keep-out volume remains unobstructed inside the system. Note that it is possible
that the keep-out volume reserved for the LAI may differ from the space normally occupied by the
Celeron processor on 0.13 micron process heatsink. If this is the case, the logic analyzer vendor
will provide a cooling solution as part of the LAI.
9.1.2
Electrical Considerations
The LAI will also affect the electrical performance of the system bus; therefore, it is critical to
obtain electrical load models from each of the logic analyzer vendors to allow running system level
simulations to prove that their tool will work in the system. Contact the logic analyzer vendor for
electrical specifications and load models for the LAI solution they provide.
obtain electrical load models from each of the logic analyzer vendors to allow running system level
simulations to prove that their tool will work in the system. Contact the logic analyzer vendor for
electrical specifications and load models for the LAI solution they provide.