Acer Intel Celeron G530 KC.53001.CDG Benutzerhandbuch

Produktcode
KC.53001.CDG
Seite von 102
 Intel
®
 Celeron
®
 Processor on 0.13 Micron Process in the 478-Pin Package Datasheet
3
 
Contents
Introduction
.................................................................................................................. 9
Terminology........................................................................................................... 9
1.1.1
Processor Packaging Terminology......................................................... 10
Electrical Specifications
........................................................................................ 13
System Bus and GTLREF ................................................................................... 13
Power and Ground Pins ...................................................................................... 13
Decoupling Guidelines ........................................................................................ 13
2.3.1
 
Decoupling ..................................................................................... 14
System Bus AGTL+ Decoupling............................................................. 14
System Bus Clock (BCLK[1:0]) and Processor Clocking ....................... 14
Voltage Identification ........................................................................................... 15
2.4.1
Phase Lock Loop (PLL) Power and Filter............................................... 16
Reserved, Unused Pins, and TESTHI[12:0]........................................................ 18
System Bus Signal Groups ................................................................................. 19
Asynchronous GTL+ Signals............................................................................... 20
Test Access Port (TAP) Connection.................................................................... 20
Maximum Ratings................................................................................................ 21
Processor DC Specifications............................................................................... 21
2.11.1 Flexible Motherboard Guidelines (FMB)................................................. 21
AGTL+ System Bus Specifications .....................................................................28
System Bus AC Specifications ............................................................................29
System Bus Signal Quality Specifications
.................................................... 41
System Bus Clock (BCLK) Signal Quality Specifications .................................... 41
System Bus Signal Quality Specifications and Measurement Guidelines...........42
System Bus Signal Quality Specifications and Measurement Guidelines...........45
3.3.1
Overshoot/Undershoot Guidelines ......................................................... 45
Overshoot/Undershoot Magnitude ......................................................... 45
Overshoot/Undershoot Pulse Duration................................................... 45
Activity Factor .........................................................................................46
Reading Overshoot/Undershoot Specification Tables............................ 46
Conformance Determination to Overshoot/Undershoot 
Specifications .........................................................................................47
................................................................. 51