Fujifilm Xeon 5060 S26361-F3312-L320 Datenbogen
Produktcode
S26361-F3312-L320
Features
96
Dual-Core Intel
®
Xeon
®
Processor 5100 Series Datasheet
Enhanced Intel SpeedStep
®
Technology creates processor performance states (P-
states) or voltage/frequency operating points. P-states are lower power capability
states within the Normal state as shown in
states within the Normal state as shown in
. Enhanced Intel SpeedStep
®
Technology enables real-time dynamic switching between frequency and voltage
points. It alters the performance of the processor by changing the bus to core
frequency ratio and voltage. This allows the processor to run at different core
frequencies and voltages to best serve the performance and power requirements of the
processor and system. The Dual-Core Intel
points. It alters the performance of the processor by changing the bus to core
frequency ratio and voltage. This allows the processor to run at different core
frequencies and voltages to best serve the performance and power requirements of the
processor and system. The Dual-Core Intel
®
Xeon
®
Processor 5100 Series has
hardware logic that coordinates the requested voltage (VID) between the processor
cores. The highest voltage that is requested for either of the processor cores is selected
for that processor package. Note that the front side bus is not altered; only the internal
core frequency is changed. In order to run at reduced power consumption, the voltage
is altered in step with the bus ratio.
cores. The highest voltage that is requested for either of the processor cores is selected
for that processor package. Note that the front side bus is not altered; only the internal
core frequency is changed. In order to run at reduced power consumption, the voltage
is altered in step with the bus ratio.
The following are key features of Enhanced Intel SpeedStep
®
Technology:
• Multiple voltage/frequency operating points provide optimal performance at
reduced power consumption.
• Voltage/frequency selection is software controlled by writing to processor MSR’s
(Model Specific Registers), thus eliminating chipset dependency.
— If the target frequency is higher than the current frequency, V
CC
is incremented
in steps (+12.5 mV) by placing a new value on the VID signals and the
processor shifts to the new frequency. Note that the top frequency for the
processor can not be exceeded.
— If the target frequency is lower than the current frequency, the processor shifts
to the new frequency and V
CC
is then decremented in steps (-12.5 mV) by
changing the target VID through the VID signals.
§