Microchip Technology MCP23S17-E/SO Linear IC SOIC-28 MCP23S17-E/SO Datenbogen

© 2007 Microchip Technology Inc.

DS21952B-page 1

• 16-bit remote bidirectional I/O port

- I/O pins default to input

• High-speed I

2

C™ interface (MCP23017)

- 100 kHz
- 400 kHz
- 1.7 MHz

• High-speed SPI interface (MCP23S17)

- 10 MHz (max.)

• Three hardware address pins to allow up to eight 

devices on the bus

• Configurable interrupt output pins

- Configurable as active-high, active-low or 

open-drain

• INTA and INTB can be configured to operate 

independently or together

• Configurable interrupt source

- Interrupt-on-change from configured register 

defaults or pin changes

• Polarity Inversion register to configure the polarity 

of the input port data

• External Reset input
• Low standby current: 1 µA (max.)
• Operating voltage:

- 1.8V to 5.5V @ -40°C to +85°C
- 2.7V to 5.5V @ -40°C to +85°C
- 4.5V to 5.5V @ -40°C to +125°C

• 28-pin PDIP (300 mil)
• 28-pin SOIC (300 mil)
• 28-pin SSOP
• 28-pin QFN

2
3
4
5
6

1

7

V

SS

NC

15

16

17

18

19

20

21

GPA4

GPA3
GPA2
GPA1
GPA0

V

DD

INTB

SCL

SDA

NC

A0

A1

A2

RE

SET

23

24

25

26

27

28

22

G

PB3

G

PB2

G

PB1

G

PB0

GP

A

7

GP

A

6

GP

A

5

1011

8 9

121314

GPB5

GPB6

GPB7

GPB4

INTA

GPB0
GPB1
GPB2

GPB3

INTA

GPB4

NC

NC

GPB5
GPB6

GPB7

SCL

GPA7
GPA6
GPA5
GPA4

GPA3
GPA2
GPA1

GPA0

V

DD

V

SS

A2
A1

A0

SDA

• 1
2
3
4

5
6
7

8
9

10
11
12

13

14

28
27
26
25

24
23
22

21
20

19
18
17

16

15

INTB
RESET

GPB0
GPB1
GPB2

GPB3

INTA

GPB4

SO

CS

GPB5
GPB6

GPB7

SCK

GPA7
GPA6
GPA5
GPA4

GPA3
GPA2
GPA1

GPA0

V

DD

V

SS

A2
A1

A0

SI

• 1
2
3
4

5
6
7

8
9

10
11
12

13

14

28
27
26
25

24
23
22

21
20

19
18
17

16

15

INTB
RESET

2
3
4
5
6

1

7

V

SS

CS

15

16

17

18

19

20

21

GPA4

GPA3
GPA2
GPA1
GPA0

V

DD

INTB

SI

SO

A0

A1

A2

RESE

T

23

24

25

26

27

28

22

GPB

3

GPB

2

GPB

1

GPB

0

GP

A7

GP

A6

GP

A5

1011

8 9

121314

GPB5

GPB6

GPB7

GPB4

INTA

SCK