Texas Instruments LM3431 Evaluation Board LM3431EVAL/NOPB LM3431EVAL/NOPB Datenbogen
Produktcode
LM3431EVAL/NOPB
t_dly =
C7 x 2.8V
57
P
A
x
1
D
DIM
SNVS547G – NOVEMBER 2007 – REVISED MAY 2013
In practice the FF pin also has a small effect on the control loop response. As a final step, switching stability at
100% dimming duty should be re-verified once the Rff value has been selected. At the optimal Rff setting, output
voltage transients will be minimized and the cathode voltage will be stable across the range of input voltage and
dimming duty cycle.
100% dimming duty should be re-verified once the Rff value has been selected. At the optimal Rff setting, output
voltage transients will be minimized and the cathode voltage will be stable across the range of input voltage and
dimming duty cycle.
The ideal cathode response illustrated in
may not be achievable over the entire input voltage range.
However, LED current will not be affected as long as the cathode voltage remains above the regulator saturation
voltage and below the open LED fault threshold (See
voltage and below the open LED fault threshold (See
section).
A wide input voltage range will cause a wider variation in the feedforward effect, thus making duty cycles less
than 1% more difficult to achieve. For any given application there is a minimum achievable dimming duty cycle.
Below this duty cycle, the cathode voltage will begin to drift higher, eventually appearing as an open LED fault
(See
than 1% more difficult to achieve. For any given application there is a minimum achievable dimming duty cycle.
Below this duty cycle, the cathode voltage will begin to drift higher, eventually appearing as an open LED fault
(See
section).
During an LED open fault condition, cathode voltage overshoot will tend to increase. If Rff is not set
appropriately, high overshoots may be detected as an LED short fault and lead to shutdown.
appropriately, high overshoots may be detected as an LED short fault and lead to shutdown.
LED Protection
Fault Modes and Fault Delay
The LM3431 provides 3 types of protection against several types of potential faults.
summarizes the fault
protections and groups the fault responses into three types (the auto-restart option is described in the next
section).
section).
Table 1. Fault Mode Summary
Fault
Mechanism
Action
Response
Type
1 LED open
SC > 3.1V
DLY charges
continue to regulate
1
1 LED short
SC > 3.1V
DLY charges
continue to regulate
All LEDs open
AFB > 2.0V
DLY charges
Shutdown or auto-restart
Output over-voltage
AFB > 2.0V
DLY charges
Shutdown or auto-restart
multiple LED short
SC > 6.0V
DLY charges
Shutdown or auto-restart
2
Multiple LED short, VIN<6V
AFB < 0.85V
DLY charges
Shutdown or auto-restart
Cathode short
CFB low at startup
DLY charges
Shutdown or auto-restart
Current limit
COMP at max
DLY charges
Shutdown or auto-restart
UVLO
VCC or EN low
No DLY flag
stand by
TSD
IC over temperature
No DLY flag
stand by
3
THM
THM < 1.2V
No DLY flag
stand by
When Type 1 or Type 2 faults occur, the DLY pin begins sourcing current (57 µA typical). A capacitor connected
from DLY to ground (C7) sets the DLY voltage ramp and shutdown delay time. For a Type 1 fault, the LM3431
will continue to regulate, although the DLY pin remains high. In this condition, the DLY pin will charge to a
maximum of 3.6V (typical).
from DLY to ground (C7) sets the DLY voltage ramp and shutdown delay time. For a Type 1 fault, the LM3431
will continue to regulate, although the DLY pin remains high. In this condition, the DLY pin will charge to a
maximum of 3.6V (typical).
In case of a Type 2 fault, when the DLY voltage reaches 2.8V (typical), the LM3431 will shut down and the DLY
pin will remain at 3.6V.
pin will remain at 3.6V.
For evaluation and debugging purposes, Type 2 shutdown can be disabled by grounding the DLY pin. It is not
recommended to leave the DLY pin open.
recommended to leave the DLY pin open.
For any fault other than a cathode short, the DLY pin will discharge (sinking 1.8 µA) when the fault is removed
before shutdown occurs. Since most fault conditions can only be sensed during the LED-on dimming period, the
DLY pin will not charge during LED-off times. When the LEDs are off, DLY is in a high impedance state and its
voltage will remain constant. If a fault is removed during the LED-off period, DLY will begin discharging at the
next LED-on cycle. If the fault is not removed, DLY will continue charging at the next LED-on cycle. Therefore,
the DLY charging time is controlled by both the DLY capacitor and the dimming duty cycle. The time for the DLY
pin to charge to the shutdown threshold can be calculated as shown:
before shutdown occurs. Since most fault conditions can only be sensed during the LED-on dimming period, the
DLY pin will not charge during LED-off times. When the LEDs are off, DLY is in a high impedance state and its
voltage will remain constant. If a fault is removed during the LED-off period, DLY will begin discharging at the
next LED-on cycle. If the fault is not removed, DLY will continue charging at the next LED-on cycle. Therefore,
the DLY charging time is controlled by both the DLY capacitor and the dimming duty cycle. The time for the DLY
pin to charge to the shutdown threshold can be calculated as shown:
(31)
22
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