Texas Instruments TPS61160(1)-243 Evaluation Module TPS61160EVM-243 TPS61160EVM-243 Datenbogen
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TPS61160EVM-243
Low Bit
(Logic 0)
High Bit
(Logic 1)
t
Low
t
High
t
LOW
t
High
Easy Scale Timing, without acknowledge RFA = 0
DA7
0
t
Start
Static High
Static High
DATA IN
t
Start
T
EOS
T
EOS
DA0
0
RFA
0
D0
1
Address Byte
DATA Byte
Easy Scale Timing, with acknowledge RFA = 1
Static High
t
ACKN
Acknowledge
true, Data Line
pulled down by
device
true, Data Line
pulled down by
device
DATA IN
DATA OUT
Acknowledge
false, no pull
down
false, no pull
down
Controller needs to
Pullup Data Line via a
resistor to detect ACKN
Pullup Data Line via a
resistor to detect ACKN
ACKN
DA7
0
Static High
T
EOS
t
valACK
DA0
0
RFA
1
D0
1
t
Start
t
Start
Address Byte
DATA Byte
SLVS791C – NOVEMBER 2007 – REVISED APRIL 2012
Table 2. EasyScale™ Bit Description
BIT
TRANSMISSION
BYTE
NAME
DESCRIPTION
NUMBER
DIRECTION
7
DA7
0 MSB device address
6
DA6
1
5
DA5
1
Device
4
DA4
1
Address
IN
Byte
3
DA3
0
72 hex
2
DA2
0
1
DA1
1
0
DA0
0 LSB device address
7 (MSB)
RFA
Request for acknowledge. If high, acknowledge is applied by device
6
A1
0 Address bit 1
5
A0
0 Address bit 0
4
D4
Data bit 4
Data byte
IN
3
D3
Data bit 3
2
D2
Data bit 2
1
D1
Data bit 1
0 (LSB)
D0
Data bit 0
Acknowledge condition active 0, this condition will only be applied in case RFA bit is
set. Open drain output, Line needs to be pulled high by the host with a pullup
set. Open drain output, Line needs to be pulled high by the host with a pullup
ACK
OUT
resistor. This feature can only be used if the master has an open drain output stage.
In case of a push pull output stage Acknowledge condition may not be requested!
In case of a push pull output stage Acknowledge condition may not be requested!
Figure 16. EasyScale™— Bit Coding
12
Copyright © 2007–2012, Texas Instruments Incorporated
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