Texas Instruments TPS61160(1)-243 Evaluation Module TPS61160EVM-243 TPS61160EVM-243 Datenbogen
Produktcode
TPS61160EVM-243
SLVS791C – NOVEMBER 2007 – REVISED APRIL 2012
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
T
A
OPEN LED PROTECTION
PACKAGE
(2)
PACKAGE MARKING
26V (typical)
TPS61160DRV
BZQ
–40°C to 85°C
38V (typical)
TPS61161DRV
BZR
(1)
For the most current package and ordering information, see the TI Web site at
(2)
The DRV package is available in tape and reel. Add R suffix (TPS61160DRVR) to order quantities of 3000 parts per reel or add T suffix
(TPS61160DRVT) to order 250 parts per reel.
(TPS61160DRVT) to order 250 parts per reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
Supply Voltages on VIN
(2)
–0.3 to 20
V
Voltages on CTRL
(2)
–0.3 to 20
V
V
I
Voltage on FB and COMP
(2)
–0.3 to 3
V
Voltage on SW
(2)
–0.3 to 40
V
P
D
Continuous Power Dissipation
See Dissipation Rating Table
T
J
Operating Junction Temperature Range
–40 to 150
°C
T
STG
Storage Temperature Range
–65 to 150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
DERATING FACTOR
BOARD PACKAGE
R
θ
JC
R
θ
JA
T
A
< 25°C
T
A
= 70°C
T
A
= 85°C
ABOVE T
A
= 25°C
Low-K
(1)
DRV
20°C/W
140°C/W
7.1 mW/°C
715 mW
395 mW
285 mW
High-K
(2)
DRV
20°C/W
65°C/W
15.4 mW/°C
1540 mW
845 mW
615 mW
(1)
The JEDEC low-K (1s) board used to derive this data was a 3in×3in, two-layer board with 2-ounce copper traces on top of the board.
(2)
The JEDEC high-K (2s2p) board used to derive this data was a 3in×3in, multilayer board with 1-ounce internal power and ground planes
and 2-ounce copper traces on top and bottom of the board.
and 2-ounce copper traces on top and bottom of the board.
RECOMMENDED OPERATING CONDITIONS
MIN
TYP
MAX
UNIT
V
I
Input voltage range, VIN
2.7
18
V
V
O
Output voltage range
VIN
38
V
L
Inductor
(1)
10
22
μ
H
f
dim
PWM dimming frequency
5
100
kHz
PWM duty cycle resolution at 10kHz
0.5%
Duty
PWM duty cycle resolution at 30kHz
1.5%
C
IN
Input capacitor
1
μ
F
C
O
Output capacitor
(1)
0.47
10
μ
F
T
A
Operating ambient temperature
–40
85
°C
T
J
Operating junction temperature
–40
125
°C
(1)
These values are recommended values that have been successfully tested in several applications. Other values may be acceptable in
other applications but should be fully tested by the user.
other applications but should be fully tested by the user.
2
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