Texas Instruments TPS62102EVM Evaluation Module TPS62102EVM TPS62102EVM Datenbogen
Produktcode
TPS62102EVM
SLUU070
5
Using the TPS62102 Low-Power High-Efficiency Buck Converter Evaluation Module
3.2
Open-Loop Small Signal AC Model
The circuit of Figure 4 is used to define the feedback loop for this evaluation module.
3.2.1
Specific Open-Loop Signal AC Model Considerations
M1 is the lumped gain corresponding to the input voltage and the PWM gain. Since the ramp height in the
chip is about 1V the PWM gain is 100%/V or just 1 in the free running case. The 8x factor comes from the
input voltage of 8 V. The PWM gain increases with synchronization. For instance, syncronizing a 1-MHz
nominal free run oscillator to 1.2 MHz increases the PWM gain to:
chip is about 1V the PWM gain is 100%/V or just 1 in the free running case. The 8x factor comes from the
input voltage of 8 V. The PWM gain increases with synchronization. For instance, syncronizing a 1-MHz
nominal free run oscillator to 1.2 MHz increases the PWM gain to:
G
SYNC
+
F
SYNC
F
FREE
G
FREE
Where:
•
G
FREE
is the free running PWM gain (1 here)
•
G
SYNC
is the synchronized PWM gain
•
F
FREE
is the free running oscillator frequency
•
F
SYNC
is the synchronized frequency
L1
15
µ
H
CF
10
µ
F
R5
113 k
Ω
R1
30.1 k
Ω
RESR
R6
1 k
Ω
C8
100 pF
R4
36 k
Ω
+
C4
1.0 nF
X
M1 x 8
ac
X
M2 x–1
EAO_1
EAO
UDG–00085
0.01
Ω
Figure 4. Open-Loop Small Signal Alternating Current (AC) Model
UDG–00104
+
–
V1
TPS6201X
EVM
CB1
CB2
TB1
TB2
+
+
LOAD
V2
ADJUSTABLE
POWER
SUPPLY
POWER
SUPPLY
Figure 5. Connection Diagram
(1)