Texas Instruments TPS61166-446 Evaluation Board TPS61166EVM-446 TPS61166EVM-446 TPS61166EVM-446 Datenbogen
Produktcode
TPS61166EVM-446
FB
VO
SW
OUT
PWM
NC
GND
VIN
EN
T
h
e
rm
a
l
P
a
d
VBAT
LED +
C 1
R 1
C 2
L 1
Vin
GND
Place enough
VIAs around
thermal pad to
enhace thermal
performance
VIAs around
thermal pad to
enhace thermal
performance
Minimize the
area of SW
trace
area of SW
trace
LED -
PWM
EN
THERMAL CONSIDERATIONS
A
D(MAX)
JA
125 C
T
P
=
R
q
°
-
(6)
SLVS991 – SEPTEMBER 2009
..........................................................................................................................................................................................
www.ti.com
high frequency noise (e.g., EMI), proper layout of the high frequency switching path is essential. Minimize the
length and area of all traces connected to the SW pin and always use a ground plane under the switching
regulator to minimize interplane coupling. The high current path including the switch and output capacitor
contains nanosecond rise and fall times and should be kept as short as possible. The input capacitor needs not
only to be close to the VIN pin, but also to the GND pin in order to reduce input supply ripple.
length and area of all traces connected to the SW pin and always use a ground plane under the switching
regulator to minimize interplane coupling. The high current path including the switch and output capacitor
contains nanosecond rise and fall times and should be kept as short as possible. The input capacitor needs not
only to be close to the VIN pin, but also to the GND pin in order to reduce input supply ripple.
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. This
restriction limits the power dissipation of the TPS61166. Calculate the maximum allowable dissipation, P
restriction limits the power dissipation of the TPS61166. Calculate the maximum allowable dissipation, P
D(MAX)
and keep the actual dissipation less than or equal to P
D(MAX)
. The maximum-power-dissipation limit is determined
using
where
T
A
= Maximum ambient temperature for the application.
R
θ
JA
= Thermal resistance junction-to-ambient listed in the dissipation ratings table.
The TPS61166 is available in a thermally enhanced QFN package. This package includes a thermal pad that
improves the thermal capabilities of the package. The R
improves the thermal capabilities of the package. The R
θ
JA
of the QFN package greatly depends on the PCB
layout and thermal pad connection. The thermal pad must be soldered to the analog ground on the PCB. Using
thermal vias underneath the thermal pad as illustrated in the layout example. Also, see the QFN/SON PCB
Attachment application report (
thermal vias underneath the thermal pad as illustrated in the layout example. Also, see the QFN/SON PCB
Attachment application report (
14
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