Texas Instruments TPS61050-269 Evaluation Board TPS61050EVM-269 TPS61050EVM-269 TPS61050EVM-269 Benutzerhandbuch
Produktcode
TPS61050EVM-269
www.ti.com
0
10
20
30
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50
60
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1
10
100
1000
I
- Output Current - mA
O
Efficiency-%
V = 3.6 V,
V
= 5 V
I
O
ILED
IOUT
VOUT
C1 = -5.000 V Offset
t - Time - 50 s/div
m
V = 3.6 V,
V
= 5 V
I
O
500mA/div
500mA/div
500mV/div
5
Board Layout
Board Layout
Figure 7. Voltage Mode Efficiency
Figure 8. Voltage Mode Load Transient
This section provides the TPS61050/2EVM-269 board layout and illustrations.
Board layout is critical for all high-frequency, switch-mode power supplies.
through
show the board layout for the TPS61050/2EVM-269 PCB. The nodes with high-switching frequencies and
currents are kept as short as possible to minimize trace inductance. Careful attention has been given to
the routing of high-frequency current loops and a single-point grounding scheme is used. Also, the
majority of the heatsinking for this device occurs through the top layer traces and vias pulled from the IC's
solder bumps that carry high currents. See the data sheet for specific layout guidelines.
currents are kept as short as possible to minimize trace inductance. Careful attention has been given to
the routing of high-frequency current loops and a single-point grounding scheme is used. Also, the
majority of the heatsinking for this device occurs through the top layer traces and vias pulled from the IC's
solder bumps that carry high currents. See the data sheet for specific layout guidelines.
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TPS61050EVM-269 and TPS61052EVM-269
SLVU215B – August 2007 – Revised November 2007