Texas Instruments OPA3695EVM Evaluation Module OPA3695EVM OPA3695EVM Datenbogen
Produktcode
OPA3695EVM
ELECTRICAL CHARACTERISTICS: V
S
= ±5V
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SBOS355A – APRIL 2008 – REVISED SEPTEMBER 2008
Boldface limits are tested at +25°C.
At R
At R
F
= 402
Ω, R
L
= 100
Ω, and G = +8, unless otherwise noted.
OPA3695
TYP
MIN/MAX OVER TEMPERATURE
0°C to
–40°C to
MIN/
TEST
PARAMETER
CONDITIONS
+25°C
+25°C
(2)
70°C
(3)
+85°C
(3)
UNITS
MAX
LEVEL
(1)
AC PERFORMANCE (see
Small-signal bandwidth (V
O
= 0.5V
PP
)
G = +1, R
F
= 909
Ω
1000
MHz
typ
C
G = +2, R
F
= 604
Ω
900
MHz
typ
C
G = +8, R
F
= 402
Ω
450
400
MHz
min
B
G = +16, R
F
= 249
Ω
340
MHz
typ
C
Bandwidth for 0.2dB gain flatness
G = +2, V
O
= 0.5V
PP
, R
F
= 604
Ω
320
MHz
min
B
Peaking at a gain of +1
R
F
= 523
Ω, V
O
= 0.5V
PP
4.6
5.4
dB
max
B
Large-signal bandwidth
G = +2, V
O
= 2V
PP
600
MHz
typ
C
G = +8, V
O
= 4V
PP
450
MHz
typ
C
Slew rate
G = +2, V
O
= 2V step
2400
V/
µ
s
typ
C
G = –8, V
O
= 4V step
4300
3700
V/
µ
s
min
B
G = +8, V
O
= 4V step
2900
2600
V/
µ
s
min
B
Rise-and-fall time
G = +2, V
O
= 4V step
1.0
ns
typ
C
G = +8, V
O
= 0.5V step
0.8
ns
typ
C
G = +8, V
O
= 4V step
1.0
ns
typ
C
Settling time to 0.02%
G = +8, V
O
= 2V step
16
ns
typ
C
Settling time to 0.1%
G = +8, V
O
= 2V step
10
ns
typ
C
Harmonic distortion
G = +8, f = 10MHz, V
O
= 2V
PP
2nd harmonic
R
L
= 100
Ω
–65
–62
dBc
max
B
R
L
≥ 500Ω
–78
–76
dBc
max
B
3rd harmonic
R
L
= 100
Ω
–86
–84
dBc
max
B
R
L
≥ 500Ω
–86
–82
dBc
max
B
2nd harmonic
G = +2, f = 10MHz, R
L
= 100
Ω
–74
dBc
typ
C
3rd harmonic
G = +2, f = 10MHz, R
L
= 100
Ω
–74
dBc
typ
C
Input voltage noise
f > 1MHz
1.8
2
nV/
√Hz
max
B
Noninverting input current noise
f > 1MHz
18
19
pA/
√Hz
max
B
Inverting input current noise
f > 1MHz
22
24
pA/
√Hz
max
B
G = +2, NTSC, V
O
= 1.4V
PP
,
Differential gain
0.04
%
typ
C
R
L
= 150
Ω
G = +2, NTSC, V
O
= 1.4V
PP
,
Differential phase
0.007
degrees
typ
C
R
L
= 150
Ω
All hostile, G = +8, f = 10MHz,
Crosstalk
–55
dB
typ
C
V
O
= 2V
PP
DC PERFORMANCE
(4)
Open-loop transimpedance gain (Z
OL
)
V
O
= 0V, R
L
= 100
Ω
85
45
43
41
k
Ω
min
A
Input offset voltage
V
CM
= 0V
±0.3
±3.5
±4.0
±4.5
mV
max
A
Average offset voltage drift
V
CM
= 0V
±10
±15
µ
V/°C
max
B
Noninverting input bias current
V
CM
= 0V
+13
±30
±37
±41
µ
A
max
A
Average noninverting input bias current drift
V
CM
= 0V
150
180
nA/°C
max
B
Inverting input bias current
V
CM
= 0V
±20
±60
±66
±70
µ
A
max
A
Average inverting input bias current drift
V
CM
= 0V
±120
±160
nA/°C
max
B
INPUT
Common-mode input voltage range (CMIR)
(5)
±3.3
±3.1
±3.0
±3.0
V
min
A
Common-mode rejection ratio (CMRR)
V
CM
= 0V
56
51
50
50
dB
min
A
Noninverting input impedance
280 || 1.2
k
Ω || pF
typ
C
Inverting input resistance (R
I
)
Open-loop
33
Ω
typ
C
(1)
Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
and simulation. (C) Typical value only for information.
(2)
Junction temperature = ambient for +25°C specifications.
(3)
Junction temperature = ambient at low temperature limits; junction temperature = ambient +48°C at high temperature limit for over
temperature specifications.
temperature specifications.
(4)
Current is considered positive out of pin.
(5)
Tested < 3dB below minimum specified CMRR at ±CMIR limits.
Copyright © 2008, Texas Instruments Incorporated
3
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