Texas Instruments TLV320AIC3105 Evaluation Module (EVM) and USB motherboard TLV320AIC3105EVM-K TLV320AIC3105EVM-K Datenbogen
Produktcode
TLV320AIC3105EVM-K
ADC PGA SIGNAL BYPASS PATH FUNCTIONALITY
INPUT IMPEDANCE AND VCM CONTROL
MICBIAS GENERATION
PASSIVE ANALOG BYPASS DURING POWER DOWN
SLAS513B – FEBRUARY 2007 – REVISED DECEMBER 2008
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In addition to the input bypass path described above, the TLV320AIC3105 also includes the ability to route the
ADC PGA output signals past the ADC, for mixing with other analog signals and then direct connection to the
output drivers. These bypass functions are described in more detail in the sections on output mixing and output
driver configurations.
ADC PGA output signals past the ADC, for mixing with other analog signals and then direct connection to the
output drivers. These bypass functions are described in more detail in the sections on output mixing and output
driver configurations.
The TLV320AIC3105 includes several programmable settings to control analog input pins, particularly when they
are not selected for connection to an ADC PGA. The default option allows unselected inputs to be put into a
high-impedance state, such that the input impedance seen looking into the device is extremely high. Note,
however, that the pins on the device do include protection diode circuits connected to AVDD and AVSS. Thus, if
any voltage is driven onto a pin approximately one diode drop (~0.6 V) above AVDD or one diode drop below
AVSS, these protection diodes begin conducting current, resulting in an effective impedance that no longer
appears as a high-impedance state.
are not selected for connection to an ADC PGA. The default option allows unselected inputs to be put into a
high-impedance state, such that the input impedance seen looking into the device is extremely high. Note,
however, that the pins on the device do include protection diode circuits connected to AVDD and AVSS. Thus, if
any voltage is driven onto a pin approximately one diode drop (~0.6 V) above AVDD or one diode drop below
AVSS, these protection diodes begin conducting current, resulting in an effective impedance that no longer
appears as a high-impedance state.
Another programmable option for unselected analog inputs is to weakly hold them at the common-mode input
voltage of the ADC PGA (which is determined by an internal bandgap voltage reference). This is useful to keep
the ac-coupling capacitors connected to analog inputs biased up at a normal dc level, thus avoiding the need for
them to charge up suddenly when the input is changed from being unselected to selected for connection to an
ADC PGA. This option is controlled in page 0, registers 20 and 23. The user should ensure this option is
disabled when an input is selected for connection to an ADC PGA or selected for the analog input bypass path,
because it can corrupt the recorded input signal if left operational when an input is selected.
voltage of the ADC PGA (which is determined by an internal bandgap voltage reference). This is useful to keep
the ac-coupling capacitors connected to analog inputs biased up at a normal dc level, thus avoiding the need for
them to charge up suddenly when the input is changed from being unselected to selected for connection to an
ADC PGA. This option is controlled in page 0, registers 20 and 23. The user should ensure this option is
disabled when an input is selected for connection to an ADC PGA or selected for the analog input bypass path,
because it can corrupt the recorded input signal if left operational when an input is selected.
In most cases, the analog input pins on the TLV320AIC3105 should be ac-coupled to analog input sources, the
only exception to this generally being if an ADC is being used for dc voltage measurement. The ac-coupling
capacitor causes a high-pass filter pole to be inserted into the analog signal path, so the size of the capacitor
must be chosen to move that filter pole sufficiently low in frequency to cause minimal effect on the processed
analog signal. The input impedance of the analog inputs when selected for connection to an ADC PGA varies
with the setting of the input level control, starting at approximately 20 k
only exception to this generally being if an ADC is being used for dc voltage measurement. The ac-coupling
capacitor causes a high-pass filter pole to be inserted into the analog signal path, so the size of the capacitor
must be chosen to move that filter pole sufficiently low in frequency to cause minimal effect on the processed
analog signal. The input impedance of the analog inputs when selected for connection to an ADC PGA varies
with the setting of the input level control, starting at approximately 20 k
Ω with an input level control setting of 0
dB, and increasing to approximately 80 k
Ω when the input level control is set at –12 dB. For example, using a
0.1-
µ
F ac-coupling capacitor at an analog input results in a high-pass filter pole of 80 Hz when the 0-dB input
level control setting is selected.
The TLV320AIC3105 includes a programmable microphone bias output voltage (MICBIAS), capable of providing
output voltages of 2 V or 2.5 V (both derived from the on-chip bandgap voltage) with 4-mA output current drive.
In addition, the MICBIAS may be programmed to be switched to AVDD directly through an on-chip switch, or it
can be powered down completely when not needed, for power savings. This function is controlled by register
programming in page 0, register 25.
output voltages of 2 V or 2.5 V (both derived from the on-chip bandgap voltage) with 4-mA output current drive.
In addition, the MICBIAS may be programmed to be switched to AVDD directly through an on-chip switch, or it
can be powered down completely when not needed, for power savings. This function is controlled by register
programming in page 0, register 25.
Programming the TLV320AIC3105 to passive analog bypass occurs by configuring the output stage switches for
passthrough. This is done by opening switches SW-L0, SW-R0 and closing either SW-L1 or SW-L2 and SW-R1
or SW-R2. See
passthrough. This is done by opening switches SW-L0, SW-R0 and closing either SW-L1 or SW-L2 and SW-R1
or SW-R2. See
. Programming this mode is done by writing to page 0, register 108.
Connecting the MIC1L/LINE1L input signal to LEFT_LOP is done by closing SW-L1 and opening SW-L0; this
action is done by writing a 1 to page 0, register 108, bit D0. Connecting the MIC2L/LINE2L input signal to
LEFT_LOP is done by closing SW-L2 and opening SW-L0; this action is done by writing a 1 to page 0, register
108, bit D2.
action is done by writing a 1 to page 0, register 108, bit D0. Connecting the MIC2L/LINE2L input signal to
LEFT_LOP is done by closing SW-L2 and opening SW-L0; this action is done by writing a 1 to page 0, register
108, bit D2.
Connecting the MIC1R/LINE1R input signal to RIGHT_LOP is done by closing SW-R1 and opening SW-R0; this
action is done by writing a 1 to page 0, register 108, bit D4. Connecting the MIC2R/LINE2R input signal to
RIGHT_LOP is done by closing SW-R2 and opening SW-R0; this action is done by writing a 1 to page 0, register
108, bit D6. A diagram of the passive analog bypass mode configuration can be seen in
action is done by writing a 1 to page 0, register 108, bit D4. Connecting the MIC2R/LINE2R input signal to
RIGHT_LOP is done by closing SW-R2 and opening SW-R0; this action is done by writing a 1 to page 0, register
108, bit D6. A diagram of the passive analog bypass mode configuration can be seen in
In general, connecting two switches to the same output pin should be avoided, as this error shorts two input
signals together, and would likely cause distortion of the signal as the two signals are in contention. Poor
frequency response would also likely occur.
signals together, and would likely cause distortion of the signal as the two signals are in contention. Poor
frequency response would also likely occur.
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