Texas Instruments Evaluation Board for the LM10506 LM10506EVAL/NOPB LM10506EVAL/NOPB Datenbogen
Produktcode
LM10506EVAL/NOPB
SNVS729E – SEPTEMBER 2011 – REVISED MARCH 2013
Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps
to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output
voltage is below the ‘high’ PFM comparator threshold (see
to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output
voltage is below the ‘high’ PFM comparator threshold (see
), the PMOS switch is again turned on and
the cycle is repeated until the output reaches the desired level. Once the output reaches the ‘high’ PFM
threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output
switches are turned off and the part enters an extremely low power mode. Quiescent supply current during this
‘idle’ mode is less than 100 µA, which allows the part to achieve high efficiencies under extremely light load
conditions. When the output drops below the ‘low’ PFM threshold, the cycle repeats to restore the output voltage
to ~1.6% above the nominal PWM output voltage.
threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output
switches are turned off and the part enters an extremely low power mode. Quiescent supply current during this
‘idle’ mode is less than 100 µA, which allows the part to achieve high efficiencies under extremely light load
conditions. When the output drops below the ‘low’ PFM threshold, the cycle repeats to restore the output voltage
to ~1.6% above the nominal PWM output voltage.
If the load current should increase during PFM mode causing the output voltage to fall below the ‘low2’ PFM
threshold, the part will automatically transition into fixed-frequency PWM mode.
threshold, the part will automatically transition into fixed-frequency PWM mode.
Soft Start
Each of the buck converters has an internal soft-start circuit that limits the in-rush current during startup. This
allows the converters to gradually reach the steady-state operating point, thus reducing startup stresses and
surges. During startup, the switch current limit is increased in steps.
allows the converters to gradually reach the steady-state operating point, thus reducing startup stresses and
surges. During startup, the switch current limit is increased in steps.
For Buck 1, 2 and 3 the soft start is implemented by increasing the switch current limit in steps that are gradually
set higher. The startup time depends on the output capacitor size, load current and output voltage. Typical
startup time with the recommended output capacitor of 10 µF is 0.2 to 1ms. It is expected that in the final
application the load current condition will be more likely in the lower load current range during the start up.
set higher. The startup time depends on the output capacitor size, load current and output voltage. Typical
startup time with the recommended output capacitor of 10 µF is 0.2 to 1ms. It is expected that in the final
application the load current condition will be more likely in the lower load current range during the start up.
Current Limiting
A current limit feature protects the device and any external components during overload conditions. In PWM
mode the current limiting is implemented by using an internal comparator that trips at current levels according to
the buck capability. If the output is shorted to ground the device enters a timed current limit mode where the
NFET is turned on for a longer duration until the inductor current falls below a low threshold, ensuring inductor
current has more time to decay, thereby preventing runaway.
mode the current limiting is implemented by using an internal comparator that trips at current levels according to
the buck capability. If the output is shorted to ground the device enters a timed current limit mode where the
NFET is turned on for a longer duration until the inductor current falls below a low threshold, ensuring inductor
current has more time to decay, thereby preventing runaway.
Internal Synchronous Rectification
While in PWM mode, the bucks use an internal NFET as a synchronous rectifier to reduce the rectifier forward
voltage drop and the associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
voltage drop and the associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
Bypass-FET Operation on Buck 1 and Buck 2 (Applies to Buck 1 only on LM10506-B)
There is an additional bypass FET used on Buck 1. The FET is connected in parallel to High Side FET and
inductor. Buck 2 has no extra bypass FET – it uses High Side FET (PFET) for bypass operation. If Buck 1 input
voltage is greater than 3.5V (2.6V for Buck 2), the bypass function is disabled. The determination of whether or
not the Buck regulators are in bypass mode or standard switching regulation is constantly monitored while the
regulators are enabled. If at any time the input voltage goes above 3.5V (2.6V for Buck 2) while in bypass mode,
the regulators will transition to normal operation.
inductor. Buck 2 has no extra bypass FET – it uses High Side FET (PFET) for bypass operation. If Buck 1 input
voltage is greater than 3.5V (2.6V for Buck 2), the bypass function is disabled. The determination of whether or
not the Buck regulators are in bypass mode or standard switching regulation is constantly monitored while the
regulators are enabled. If at any time the input voltage goes above 3.5V (2.6V for Buck 2) while in bypass mode,
the regulators will transition to normal operation.
When the bypass mode is enabled, the output voltage of the buck that is in bypass mode is not regulated, but
instead, the output voltage follows the input voltage minus the voltage drop seen across the FET and DCR of the
inductor. The voltage drop is a direct result of the current flowing across those resistive elements. When Buck 1
transitions into bypass mode, there is an extra FET used in parallel along with the high side FET for transmission
of the current to the load. This added FET will help reduce the resistance seen by the load and decrease the
voltage drop. For Buck 2, the bypass function uses the same high side FET. For LM10506 -C, -D,when Buck 1 is
re-enabled upon exiting STANDBY, soft start will engage.
instead, the output voltage follows the input voltage minus the voltage drop seen across the FET and DCR of the
inductor. The voltage drop is a direct result of the current flowing across those resistive elements. When Buck 1
transitions into bypass mode, there is an extra FET used in parallel along with the high side FET for transmission
of the current to the load. This added FET will help reduce the resistance seen by the load and decrease the
voltage drop. For Buck 2, the bypass function uses the same high side FET. For LM10506 -C, -D,when Buck 1 is
re-enabled upon exiting STANDBY, soft start will engage.
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