Texas Instruments DS90UB927Q-Q1 5MHz-85MHz FPD-Link III Serializer Evaluation Module DS90UB927QEVM DS90UB927QEVM Datenbogen
Produktcode
DS90UB927QEVM
Draft
Usage
Figure 4-6. Register Tab with expanded register description
4.3.1 Information Tab
The information tab gives basic device state information, including local device information, partner device
information, and current link status. For both the local device and partner device, the tab gives the
following information:
information, and current link status. For both the local device and partner device, the tab gives the
following information:
•
Device Name
•
Device Revision
•
I2C address
•
Pixel clock range (set by LFMODE)
•
Repeater Status (set by REPEAT)
•
Serial Link Mode (set by BKWD)
•
Audio mode (set by configuration registers)
4.3.2 System Topology Tab
The System Topology Tab gives an overview of all devices downstream from the deserializer. Individual
devices may be clicked on for individual I2C access. The user may read/write to a specific device from the
Device Reg Access panel.
devices may be clicked on for individual I2C access. The user may read/write to a specific device from the
Device Reg Access panel.
4.3.3 Pattern Generator Tab
The Pattern Generator Tab enables interactive control of the internal pattern generator features. The pane
controls timing information and different pattern settings, including a scrolling function. Timing information
is configured from the Video Control panel, and supports the following timing/clocking sources:
controls timing information and different pattern settings, including a scrolling function. Timing information
is configured from the Video Control panel, and supports the following timing/clocking sources:
•
External
•
Internal
13
SNLU125 – November 2012
ALP Software
Copyright © 2012, Texas Instruments Incorporated