Texas Instruments TPS92311A19230VEVM Evaluation Module TPS92311A19230VEVM TPS92311A19230VEVM Datenbogen
Produktcode
TPS92311A19230VEVM
SNVS811B – MAY 2012 – REVISED MAY 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2)
SW to GND
-0.3V to 600V
VCC to GND
-0.3V to 40V
DLY, COMP, ZCD to GND
-0.3V to 7V
ISNS to GND
-0.3V to 7V
MODE1 to GND
-0.3V to 7V
MODE2 to GND
-0.3V to 7V
SW FET Drain Current
Peak
1.2A
Continuous
Limited by T
J-MAX
Continuous Power Dissipation
Internally Limited
ESD Susceptibility
HBM
(3)
±2 kV
Storage Temperature Range
-65°C to +150°C
Junction Temperature (T
J-MAX
)
+125°C
Maximum Lead Temperature (Solder and Reflow)
260°C
(1)
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics. All voltages are with respect to the potential at the GND pin, unless otherwise specified.
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics. All voltages are with respect to the potential at the GND pin, unless otherwise specified.
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
specifications.
(3)
Human Body Model, applicable std. JESD22-A114-C.
Operating Conditions
Supply Voltage range VCC
13V to 36V
Junction Temperature (T
J
)
-40°C to +125°C
Thermal Resistance (
θ
JA
)
(1)
95°C/W
(1)
This R
θ
JA
typical value determined using JEDEC specifications JESD51-1 to JESD51-11. However junction-to-ambient thermal
resistance is highly boardlayout dependent. In applications where high maximum power dissipation exists, special care must be paid to
thermal dissipation issues during board design. In high-power dissipation applications, the maximum ambient temperature may have to
be derated. Maximum ambient temperature (T
thermal dissipation issues during board design. In high-power dissipation applications, the maximum ambient temperature may have to
be derated. Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operating junction temperature (T
J-MAX-OP
= 125°C),
the maximum power dissipation of the device in the application (P
D-MAX
), and the junction-to ambient thermal resistance of the
part/package in the application (R
θ
JA
), as given by the following equation: T
A-MAX
= T
J-MAX-OP
– (R
θ
JA
× P
D-MAX
).
Copyright © 2012–2013, Texas Instruments Incorporated
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