Texas Instruments CDCE62002EVM - CDCE62002 Evaluation Module CDCE62002EVM CDCE62002EVM Datenbogen
Produktcode
CDCE62002EVM
3
Signal Path and Control Circuit
4
Software Selectable Options
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Signal Path and Control Circuit
The CDCE62002 provides support for selectable dual-inputs. One of the inputs is (PRI REF) can accept a
800kHz–500MHz frequency input from a differential signal source or a 800kHz–200MHz frequency input
from a single ended signal source. The second input (AUX IN) can support a crystal in the frequency
range of 2MHz to 42MHz or a single ended input (LVCMOS) up to 70MHz. The CDCE62002EVM provides
support for driving the AUX IN signal from an on-board 5mm x 3.2mm SMD crystal. If the AUX IN is
alternately driven by the SMA, the on-board crystal has to be removed and R65 should be populated with
a 0
800kHz–500MHz frequency input from a differential signal source or a 800kHz–200MHz frequency input
from a single ended signal source. The second input (AUX IN) can support a crystal in the frequency
range of 2MHz to 42MHz or a single ended input (LVCMOS) up to 70MHz. The CDCE62002EVM provides
support for driving the AUX IN signal from an on-board 5mm x 3.2mm SMD crystal. If the AUX IN is
alternately driven by the SMA, the on-board crystal has to be removed and R65 should be populated with
a 0
Ω
resistor.
The CDCE62002 provides support for up to two differential (LVDS or LVPECL) or four single ended
(LVCMOS) or any combination of outputs in the range of 10.93MHz to 1.175GHz. The on-chip PLL
architecture can be configured such as to enable the device operated either as a jitter cleaner or a
frequency synthesizer or both.
(LVCMOS) or any combination of outputs in the range of 10.93MHz to 1.175GHz. The on-chip PLL
architecture can be configured such as to enable the device operated either as a jitter cleaner or a
frequency synthesizer or both.
The CDCE62002 provides support for either a completely internal loop filter or a partially external loop
filter. The loop filter selection will affect the output frequency phase noise and should be considered in
conjunction with the type of input used. If the CDCE62002 is to be used only as a frequency synthesizer,
the completely internal loop filter option is recommended. If the CDCE62002 is to be used as a jitter
cleaner, the partially external loop filter option is recommended.
filter. The loop filter selection will affect the output frequency phase noise and should be considered in
conjunction with the type of input used. If the CDCE62002 is to be used only as a frequency synthesizer,
the completely internal loop filter option is recommended. If the CDCE62002 is to be used as a jitter
cleaner, the partially external loop filter option is recommended.
For any output of the CDCE62002, its frequency is determined through selection of either of the device’s
on-chip twin VCOs, selection of one of the device’s two inputs, the input divider, the prescalar divider,
pre-configured internal loop filter settings or external loop filter and output divider, all of which are chosen
based on the CDCE62002 data sheet.
on-chip twin VCOs, selection of one of the device’s two inputs, the input divider, the prescalar divider,
pre-configured internal loop filter settings or external loop filter and output divider, all of which are chosen
based on the CDCE62002 data sheet.
Each of the two outputs of the CDCE62002 can be selected through the software interface as a LVPECL
or LVDS or LVCMOS signaling level. The CDCE62002EVM provides support for on-board DC termination
for the LVPECL outputs through on-board jumper.
or LVDS or LVCMOS signaling level. The CDCE62002EVM provides support for on-board DC termination
for the LVPECL outputs through on-board jumper.
In LVCMOS mode the device can achieve up to 250MHz. In LVPECL mode the device can achieve up to
1.175GHz. In LVDS mode, the device can achieve up to 800MHz.
1.175GHz. In LVDS mode, the device can achieve up to 800MHz.
The provided GUI software allows users to easily send commands to the CDCE62002 through the
host-powered USB interface. The EVM includes a slave USB controller that transmits the commands to
the SPI programming interface included on the CDCE62002. The DC power for the USB controller can
either be derived out of the 5V power pin in the USB cable or by using an external 5V AC adapter into the
slot available on the EVM. If the device is accessible for programming by the SPI programming interface
through the USB controller, the on-board LED D25 would be lit on power-up.
host-powered USB interface. The EVM includes a slave USB controller that transmits the commands to
the SPI programming interface included on the CDCE62002. The DC power for the USB controller can
either be derived out of the 5V power pin in the USB cable or by using an external 5V AC adapter into the
slot available on the EVM. If the device is accessible for programming by the SPI programming interface
through the USB controller, the on-board LED D25 would be lit on power-up.
In addition to changing configuration to the CDCE62002 SRAM while the board is powered, configuration
can also be stored in EEPROM within the CDCE62002. This allows users to start the EVM in the desired
state without needing programming at power-up.
can also be stored in EEPROM within the CDCE62002. This allows users to start the EVM in the desired
state without needing programming at power-up.
Note that the CDCE62002 does have a permanent EEPROM lock mode. After this mode is selected the
EEPROM within the CDCE62002 cannot be changed. This is useful when setting final configurations.
EEPROM within the CDCE62002 cannot be changed. This is useful when setting final configurations.
The CDCE62002EVM software also supports for the device GUI configurations to be saved into a .INI file,
which can be opened up at a later time with this GUI.
which can be opened up at a later time with this GUI.
SCAU034 – June 2009
Two/Four Output Low Phase Noise Clock Evaluation Board
3