Texas Instruments Evaluation Module for DRV8842 DRV8842EVM DRV8842EVM Datenbogen
Produktcode
DRV8842EVM
VREF = DAC_VALUE
·
2.5
V
¾
4095
The Windows Application
3.2.1
About DECAY
The DECAY pin is in reality a triple state input. The GPIO operates as HI and LO according to the
checkbox. To have the DECAY pin floating, engaging mixed decay mode, simply remove the decay
jumper JP3.
checkbox. To have the DECAY pin floating, engaging mixed decay mode, simply remove the decay
jumper JP3.
3.3
Updating DAC Output for Current Control (VREFA and VREFB)
If the DRV88xx has been configured to accept VREF analog voltages through the microcontroller DAC
outputs (refer to Jumpers section), then the slider bar on the Current Control frame can be used to set the
VREF voltage. The label below the slider bar will inform the user what this analog voltage should be set
to, if proper communications have been established with the EVM module.
outputs (refer to Jumpers section), then the slider bar on the Current Control frame can be used to set the
VREF voltage. The label below the slider bar will inform the user what this analog voltage should be set
to, if proper communications have been established with the EVM module.
Figure 6. Current Control
The 12-bit DAC channels 0/1 are connected to the DRV88xx VREF analog inputs VREF. Changing the
DAC digital value from 0 to 4095, changes the analog voltage at the respective VREF pin from 0 V to 2.5
V respectively, following the equation:
DAC digital value from 0 to 4095, changes the analog voltage at the respective VREF pin from 0 V to 2.5
V respectively, following the equation:
(1)
Where:
VREF is the output voltage.
DAC_VALUE is a number from 0 to 4095.
3.4
DC Motor Speed Control (PWM)
For the purpose to control DC motor speed and direction, sliders have been provided which apply a PWM
to the ENABLE and PHASE lines (IN1 and IN2 on the DRV8842 variant). Each PWM slider consists of an
8-bit number so positions from 0 to 255 are obtained. A label below the slider bar informs the user what
the obtained duty cycle should be, if proper communications have been established with the EVM module.
to the ENABLE and PHASE lines (IN1 and IN2 on the DRV8842 variant). Each PWM slider consists of an
8-bit number so positions from 0 to 255 are obtained. A label below the slider bar informs the user what
the obtained duty cycle should be, if proper communications have been established with the EVM module.
The MSP430 microcontroller directly transforms this 8-bit number into the respective duty cycle. PWM
frequency is around 31.25 kHz.
frequency is around 31.25 kHz.
8
CPG005_DRV88xx Evaluation Modules
SLVU410
–
April 2011
Copyright
©
2011, Texas Instruments Incorporated