Texas Instruments TPS43350EVM Evaluation Module TPS43350EVM TPS43350EVM Datenbogen
Produktcode
TPS43350EVM
ENB
disabled
ENB
enabled
0
1
0
1
SYNC
external
clock
LPM
0
1
SYNC
SYNC
0
1
forced continuous
conduction mode
OR
spread spectrum
0
1
RT
600KHz
RT
RT
400KHz
240KHz
EXTSUP
VOUTA selected
VOUTB selected
A
EXTSUP
B
A
B
Setup
Figure 2. ENB Jumper Settings
JP2
–
SYNC is the external clock input for switching frequency synchronization of the buck converters and
to enable Low Power Mode (LPM). The external clock source can be attached to the center pin of JP4. A
high logic level on this pin ensures forced continuous mode operation of the buck controllers and inhibits
transition to low power mode. An open or low allows discontinuous mode operation and entry into low
power mode at light loads. On the TPS43351, a high level enables frequency-hopping spread spectrum
while an open or a low level disables it.
high logic level on this pin ensures forced continuous mode operation of the buck controllers and inhibits
transition to low power mode. An open or low allows discontinuous mode operation and entry into low
power mode at light loads. On the TPS43351, a high level enables frequency-hopping spread spectrum
while an open or a low level disables it.
Figure 3. SYNC Jumper Setting
JP5
–
RT is the jumper used to choose the switching frequency of the Buck controllers. The operating
frequency can be set to 240 KHz, 400 KHz or 600 KHz.
Figure 4. RT Jumper Setting
JP4
–
EXTSUP is the jumper used to choose one of the Buck output voltages (VOUTA or VOUTB) to
provide the internal voltage VREG. If no jumper is plugged, VREG is generated from the input voltage.
Figure 5. EXTSUP Jumper Setting
2
TPS4335xEVM Evaluation Module
SLVU484
–
June 2011
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2011, Texas Instruments Incorporated