Texas Instruments Evaluation Module for 2.25MHz Step-Down Converter with Dual LDOs & SVS TPS650061EVM-584 TPS650061EVM-584 Datenbogen
Produktcode
TPS650061EVM-584
www.ti.com
Connector and Test Point Description
4
Connector and Test Point Description
4.1
J1 – VIN/GND
The input power supply has to be connected to this header. The power supply must be connected
between J1 pins 1 and 2 (positive connection) and J1 pins 3 and 4 (GND). The leads to the input supply
should be twisted and kept as short as possible. The input voltage has to be between 2.3-V and 6-V.
between J1 pins 1 and 2 (positive connection) and J1 pins 3 and 4 (GND). The leads to the input supply
should be twisted and kept as short as possible. The input voltage has to be between 2.3-V and 6-V.
4.2
J2 – RST/GND
J2 pin 1 is connected to the open drain output RST of the Supply Voltage Supervisor.
RST is pulled low if either manual reset input MR is low or the voltage on RSTSNS is below the threshold.
If manual reset MR is released or the voltage on RSTSNS rises above the threshold voltage RST goes
high again after the reset recovery time t
high again after the reset recovery time t
RST
exceeded.
4.3
J3 – VODC / GND
This header is the output of the step-down converter. This output voltage is externally adjustable for the
TPS650061. The default setting on the EVM is 1.2V. VODC is capable of sourcing up to 1.0-A. A load can
be connected between J3 pins 1 and 2 (positive connection) and J3 pins 3 and 4 (GND).
TPS650061. The default setting on the EVM is 1.2V. VODC is capable of sourcing up to 1.0-A. A load can
be connected between J3 pins 1 and 2 (positive connection) and J3 pins 3 and 4 (GND).
4.4
J4– VLDO1/GND
This header is the output of LDO1. This output voltage is internally fixed for the TPS650061 at 3.3-V.
VLDO2 is capable of sourcing up to 300-mA. A load can be connected between J4 pins 1 and 2 (positive
connection) and J4 pins 3 and 4 (GND).
VLDO2 is capable of sourcing up to 300-mA. A load can be connected between J4 pins 1 and 2 (positive
connection) and J4 pins 3 and 4 (GND).
4.5
J5 – VLDO2
This header is the output of LDO2. This output voltage is internally fixed for the TPS650061 at 1.8-V.
VLDO2 is capable of sourcing up to 300-mA. A load can be connected between J5 pins 1 and 2 (positive
connection) and J5 pins 3 and 4 (GND).
VLDO2 is capable of sourcing up to 300-mA. A load can be connected between J5 pins 1 and 2 (positive
connection) and J5 pins 3 and 4 (GND).
4.6
J6 – PG/GND
J6 pin 1 is pulled to GND if the output voltages of the DCDC converter and both LDOs are > 90% of their
set point and all enable pins are pulled high.
set point and all enable pins are pulled high.
J6 pin 1 is pulled up to the selected pull-up voltage level if any of the output voltages VODC, VLDO1 or
VLDO2 is < 90% of its set point or all enable pins are pulled low.
VLDO2 is < 90% of its set point or all enable pins are pulled low.
4.7
JP1 – VINLDO1
This header is the input supply for LDO1. Placing a shorting bar between VINLDO1 and VINDC/VODC
supplies LDO1 from VIN with R2. It can be also supplied from the output of the converter VODC with R1
(not assembled). An external power supply can be connected between JP1 pin 2 (VINLDO1) and pin 3
(GND). Note that the resistors R1 and R2 should be removed when supplying the LDO from an external
power supply.
supplies LDO1 from VIN with R2. It can be also supplied from the output of the converter VODC with R1
(not assembled). An external power supply can be connected between JP1 pin 2 (VINLDO1) and pin 3
(GND). Note that the resistors R1 and R2 should be removed when supplying the LDO from an external
power supply.
4.8
JP2 – VINLDO2
This header is the input supply for LDO2. Placing a shorting bar between VINLDO2 and VINDC/VODC
supplies LDO2 from VIN with R4. It can be also supplied from the output of the converter VODC with R3
(not assembled). An external power supply can be connected between JP2 pin 2 (VINLDO2) and pin 3
(GND). Note that the resistors R3 and R4 should be removed when supplying the LDO from an external
power supply.
supplies LDO2 from VIN with R4. It can be also supplied from the output of the converter VODC with R3
(not assembled). An external power supply can be connected between JP2 pin 2 (VINLDO2) and pin 3
(GND). Note that the resistors R3 and R4 should be removed when supplying the LDO from an external
power supply.
5
SLVU354 – March 2010
Using the TPS650061EVM 2.25 MHz Step-Down Converter with Dual LDO
Copyright © 2010, Texas Instruments Incorporated