Texas Instruments TPS650250EVM-447 Evaluation Module TPS650250EVM-447 TPS650250EVM-447 Datenbogen
Produktcode
TPS650250EVM-447
6
EVM Assembly Drawings and Layout
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EVM Assembly Drawings and Layout
Table 2. TPS650250 EVM Factory Jumper Setup (continued)
Jumper
Shunt Location
JP7
Between ON and VDD_ALIVE
VDD_ALIVE enabled
JP8
Between V-HI and DEF1
DCDC1 set to 3.3 V
JP6
Between PWM and MODE
JP9
Between V-LOW and DEF2
DCDC2 set to 1.8 V
through
show the design of the TPS650250EVM printed circuit board. The EVM has
been designed using a 4-Layer, 1oz copper-clad circuit board 2.2”
×
3.3”
Figure 3. TPS650250 EVM Top Assembly
SLVU290 – July 2009
Using the TPS650250EVM Power Management IC for Li-Ion Powered Systems
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