Texas Instruments THS7368EVM Evaluation Module THS7368EVM THS7368EVM Datenbogen
Produktcode
THS7368EVM
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SD1 OUT
SD2 OUT
SD3 OUT
Disable SD
GND
Disable SF
SF1 OUT
SF2 OUT
SF3 OUT
Bypass SF
SD1 IN
SD2 IN
SD3 IN
Filter 2
V
S+
Filter 1
SF1 IN
SF2 IN
SF3 IN
Bypass SD
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SBOS497 – DECEMBER 2009
PIN CONFIGURATION
PW PACKAGE
TSSOP-20
(TOP VIEW)
NOTE: NC = No connection.
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
SD1 IN
1
I
Standard-definition video input, channel 1; LPF = 9.5 MHz
SD2 IN
2
I
Standard-definition video input, channel 2; LPF = 9.5 MHz
SD3 IN
3
I
Standard-definition video input, channel 3; LPF = 9.5 MHz
Filter 2
4
I
Used in conjunction with Filter 1 for selecting the LPF on SF channels
V
S+
5
I
Positive power-supply pin; connect to +2.7 V up to +5 V
Filter 1
6
I
Used in conjunction with Filter 2 for selecting the LPF on SF channels
SF1 IN
7
I
Component or RGB video input, channel 1
SF2 IN
8
I
Component or RGB video input, channel 2
SF3 IN
9
I
Component or RGB video input, channel 3
Bypass all SD channel filters. Logic high bypasses the internal filters and logic low engages the
Bypass SD
10
I
internal filters.
Bypass all SF channel filters. Logic high bypasses the internal filters and logic low engages the
Bypass SF
11
I
internal filters.
SF3 OUT
(1)
12
O
Component or RGB video output, channel 3
SF2 OUT
13
O
Component or RGB video output, channel 2
SF1 OUT
14
O
Component or RGB video output, channel 1
Disable selectable filter channels. Logic high disables the SF channels and logic low enables the SF
Disable SF
15
I
channels.
GND
16
I
Ground pin for all internal circuitry
Disable standard definition channels. Logic high disables the SD channels and logic low enables the
Disable SD
17
I
SD channels.
SD3 OUT
18
O
Standard-definition video output, channel 3; LPF = 9.5 MHz
SD2 OUT
19
O
Standard-definition video output, channel 2; LPF = 9.5 MHz
SD1 OUT
20
O
Standard-definition video output, channel 1; LPF = 9.5 MHz
(1)
SF indicates selectable filter.
Copyright © 2009, Texas Instruments Incorporated
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