Texas Instruments Evaluation Module for TPS24711 Positive Voltage, Power-Limiting Hotswap Controller TPS24711EVM-004 TPS24711EVM-004 Datenbogen
Produktcode
TPS24711EVM-004
U
VL
O
T
h
re
sh
o
ld
V
o
lt
a
g
e
(V)
–
50
–2
0
10
40
70
100
130
Temperature (°C)
V
= 12 V
VCC
2.20
2.24
2.28
2.32
2.36
UVLO Upper Threshold
UVLO Lower Threshold
0
0.4
0.8
1.2
1.6
2
EN
T
h
re
sh
o
ld
V
o
lt
a
g
e
(V)
–50
–20
–10
10
30
50
70
90
110
130
Temperature (°C)
V
= 12 V
VCC
EN Upper Threshold
T
IMER
A
ct
iva
ti
o
n
V
o
lt
a
g
e
T
h
re
sh
o
ld
(V)
3
4
5
6
7
0
4
8
12
16
20
Input Voltage, V
(V)
VCC
T = 25°C
T = 125°C
T = –40°C
0
0.4
0.8
1.2
1.6
2
F
a
u
lt
-T
ime
r
P
e
ri
o
d
(ms)
–50
–20
10
40
70
100
130
Temperature (°C)
V
= 12 V
VCC
C = 10 nF
T
C = 4.7 nF
T
C = 1 nF
T
G
a
te
V
o
lt
a
g
e
R
e
fe
re
n
ce
d
t
o
G
N
D
,
V
(V)
G
A
T
E
0
4
8
12
16
20
Input Voltage, V
(V)
VCC
8
12
16
20
24
28
32
T = 25°C
T = 125°C
T = –40°C
V
o
lt
a
g
e
,
V
(V)
(
)
VC
C
–
SEN
SE
–
10
0
10
2
0
3
0
4
0
–
0.2
–
0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.9
–
0.25
–
0.2
–
0.15
–
0.1
–
0.05
0
0.05
0.1
0.15
0.2
0.25
Time (µs)
G
a
te
C
u
rre
n
t
(A
)
V
= 3.3 V
VCC
V
(
)
VCC – SENSE
T = 125°C
T = –40°C
T = 25°C
SLVSAL2E – JANUARY 2011 – REVISED NOVEMBER 2013
TYPICAL CHARACTERISTICS (continued)
Figure 11. Gate Current During Fast Trip,
Figure 12. Gate Voltage With Zero Gate Current vs Input
Voltage
V
VCC
= V
GATE
= 3.3 V
Figure 13. TIMER Activation Voltage Threshold vs Input
Figure 14. Fault-Timer Period vs Temperature With Various
Voltage at Various Temperatures
TIMER Capacitors
Figure 15. EN Threshold Voltage vs Temperature
Figure 16. UVLO Threshold Voltage vs Temperature
Copyright © 2011–2013, Texas Instruments Incorporated
11
Product Folder Links: