Texas Instruments TPS61253 Chip Scale step-up dc-dc converters, 3.5-MHz high efficiency Evaluation Module TPS61253EVM-76 TPS61253EVM-766 Datenbogen
Produktcode
TPS61253EVM-766
Test Results
3.4
Jumpers
3.4.1
JP1: Enable Jumper
Placing a jumper across pins EN and ON ties the EN pin to V
IN
, and enables the device. Placing a jumper
across pins EN and OFF ties the EN pin to GND, this disables the device.
3.4.2
JP2 Bypass
JP2 is the operating mode selection pin of the device and is only of relevance when the device is disabled
(EN = low). Placing a jumper between BP and Low selects shutdown (that is, true load disconnect mode);
thus, the device is in shutdown mode when EN is pulled low.
(EN = low). Placing a jumper between BP and Low selects shutdown (that is, true load disconnect mode);
thus, the device is in shutdown mode when EN is pulled low.
Placing a jumper between BP and High selects bypass mode. The output is biased at the input voltage
level with a maximum load current capability of approximately 150 mA when EN is pulled low. In this
mode, the device consumes only a standby current of 22
level with a maximum load current capability of approximately 150 mA when EN is pulled low. In this
mode, the device consumes only a standby current of 22
μ
A (typical).
4
Test Results
This section provides typical performance waveforms for the TPS6125xEVM-766 characteristic of this
EVM design.
EVM design.
4.1
Power Save Mode Operation
Figure 2. TPS61253 in Power Save Mode Operation with 40-mA load
5
SLVU744 – August 2012
TPS6125xEVM-766, 3.5-MHz High Efficiency Step-Up Converter In Chip
Scale Packaging EVM
Copyright © 2012, Texas Instruments Incorporated