Texas Instruments CDCLVP2106EVM - CDCLVP2106 Evaluation Module CDCLVP2106EVM CDCLVP2106EVM Datenbogen
Produktcode
CDCLVP2106EVM
User's Guide
SCAU037 – August 2009
Low Additive Phase Noise Clock Buffer Evaluation Board
Figure 1. CDCLVP2106EVM Evaluation Board
Features:
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Easy-to-use evaluation board to fan out low phase noise clocks
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Easy device setup
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Fast configuration
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Control pins configurable through jumpers
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Board powered at +2.5-V/+3.3-V
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Single-ended or differential input clocks
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CDCLVP2106 supports 12 LVPECL outputs; CDCLVP2106EVM supports four LVPECL outputs
Contents
1
General Description
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2
Signal Path and Control Circuitry
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3
Getting Started
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4
Input Clock Selection
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5
Output Clock
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6
Schematics and Layout
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List of Figures
1
CDCLVP2106EVM Evaluation Board
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2
CDCLVP2106EVM—Schematic
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3
CDCLVP2106EVM—Schematic
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4
CDCLVP2106EVM—Schematic
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1
SCAU037 – August 2009
Low Additive Phase Noise Clock Buffer Evaluation Board
Copyright © 2009, Texas Instruments Incorporated