Texas Instruments BQ2022A Evaluation Module BQ2022AEVM-001 BQ2022AEVM-001 Datenbogen
Produktcode
BQ2022AEVM-001
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READ STATUS
WRITE STATUS
SLUS724C – SEPTEMBER 2006 – REVISED AUGUST 2007
The READ STATUS command is used to read data from the EPROM status data field. After issuing a ROM
command, the host issues the READ STATUS command, AAh, followed by the address low byte and then the
address high byte.
command, the host issues the READ STATUS command, AAh, followed by the address low byte and then the
address high byte.
NOTE:
An 8-bit CRC of the command byte and address bytes is computed by the bq2022A
and read back by the host to confirm that the correct command word and starting
address were received.
and read back by the host to confirm that the correct command word and starting
address were received.
If the CRC read by the host is incorrect, a reset pulse must be issued and the entire sequence must be repeated.
If the CRC received by the host is correct, the host issues read time slots and receives data from the bq2022A
starting at the supplied address and continuing until the end of the EPROM Status data field is reached. At that
point, the host receives an 8-bit CRC that is the result of shifting into the CRC generator all of the data bytes
from the initial starting byte through the final factory-programmed byte that contains the 00h value.
If the CRC received by the host is correct, the host issues read time slots and receives data from the bq2022A
starting at the supplied address and continuing until the end of the EPROM Status data field is reached. At that
point, the host receives an 8-bit CRC that is the result of shifting into the CRC generator all of the data bytes
from the initial starting byte through the final factory-programmed byte that contains the 00h value.
This feature is provided because the EPROM status information may change over time making it impossible to
program the data once and include an accompanying CRC that is always valid. Therefore, the READ status
command supplies an 8-bit CRC that is based on (and always is consistent with) the current data stored in the
EPROM status data field.
program the data once and include an accompanying CRC that is always valid. Therefore, the READ status
command supplies an 8-bit CRC that is based on (and always is consistent with) the current data stored in the
EPROM status data field.
After the 8-bit CRC is read, the host receives logical 1s from the bq2022A until a reset pulse is issued. The
READ STATUS command sequence can be ended at any point by issuing a reset pulse.
READ STATUS command sequence can be ended at any point by issuing a reset pulse.
Read STATUS
Initialization and ROM
READ MEMORY Command
Address Low
Address High
Read and
Memory Until End
Read and
Command
AAh
Byte
Byte
Verify CRC
of STATUS
Verify CRC
Sequence
Memory
A0
A7 A8
A15
Figure 10. READ STATUS CommandFigure
The Write Status command is used to program the EPROM Status data field after the bq2022A has been
selected by a ROM command
selected by a ROM command
The flow chart in
illustrates that the host issues the Write Status command, 55h, followed by the
address low byte and then the address high byte the followed by the byte of data to be programmed.
NOTE:
Individual bytes of address and data are transmitted LSB first. An 8-bit CRC of the
command byte, address bytes, and data byte is computed by the bq2022A and read
back by the host to confirm that the correct command word, starting address, and
data byte were received.
command byte, address bytes, and data byte is computed by the bq2022A and read
back by the host to confirm that the correct command word, starting address, and
data byte were received.
If the CRC read by the host is incorrect, a reset pulse must be issued and the entire sequence must be repeated.
If the CRC received by the host is correct, the program command (5Ah) is issued. After the program command is
issued, then the programming voltage, V
If the CRC received by the host is correct, the program command (5Ah) is issued. After the program command is
issued, then the programming voltage, V
PP
is applied to the DATA pin for period t
PROG
. Prior to programming, the
first seven bytes of the EPROM STATUS data field appear as logical 1s. For each bit in the data byte provided
by the host that is set to a logical 0, the corresponding bit in the selected byte of the EPROM STATUS data field
is programmed to a logical 0 after the programming pulse has been applied at the byte location. The eighth byte
of the EPROM STATUS byte data field is factory-programmed to contain 00h.
by the host that is set to a logical 0, the corresponding bit in the selected byte of the EPROM STATUS data field
is programmed to a logical 0 after the programming pulse has been applied at the byte location. The eighth byte
of the EPROM STATUS byte data field is factory-programmed to contain 00h.
10
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