Texas Instruments TAS5630PHD Evaluation Module TAS5630PHD2EVM TAS5630PHD2EVM Datenbogen
Produktcode
TAS5630PHD2EVM
RESET
(SW11)
(SW11)
+50 V
(J15)
LEFT BTL
SPEAKER
OUTPUT
(J11)
RIGHT BTL
SPEAKER
OUTPUT
(J13)
(SW1)
OUTPUT
ST
AGE
CHANNEL
RIGHT
PBL
T
SERight
Input
(J21)
(SW2)
BTL PBTL
BTL PBTL
OUTPUT
ST
AGE
CHANNEL
LEFT
PBTL Mode
Input
Signal
.:
SELeft
Input
(J20)
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Protection
2.5
Speaker Connection
CAUTION
Both positive and negative speaker outputs are floating and may not be
connected to ground (e.g., through an oscilloscope).
connected to ground (e.g., through an oscilloscope).
2.6
Output configuration BTL and PBTL
When changing mode e.g. from BTL to PBTL make sure that RESET switch (SW11) is activated before
changing the state of mode switches SW1 and SW2. Switch SW1 and SW2 has to be synchronized in
state BTL or PBTL.
changing the state of mode switches SW1 and SW2. Switch SW1 and SW2 has to be synchronized in
state BTL or PBTL.
Input signal to RCA connector J20 when operating PBTL mode. J21 is disabled.
In PBTL mode, the load has to be connected according to :
Figure 3. Figure 3. PBTL Mode Configuration
3
Protection
This section describes the short-circuit protection and fault-reporting circuitry of the TAS5630 device.
7
SLAU287A – December 2009 – Revised May 2010
TAS5630PHD2EVM
Copyright © 2009–2010, Texas Instruments Incorporated