Texas Instruments LMK00105 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input LMK00105BEVAL/NOP LMK00105BEVAL/NOPB Datenbogen
Produktcode
LMK00105BEVAL/NOPB
SNAS579F – MARCH 2012 – REVISED MAY 2013
Table 2. CLKin Input vs. Output States
CLKin
CLKin*
Output State
Open
Open
Logic Low
Logic Low
Logic Low
Logic Low
Logic High
Logic Low
Logic High
Logic Low
Logic High
Logic Low
OSCin/OSCout Pins
The LMK00105 has a crystal oscillator which will be powered up when OSCin is selected. Alternatively, OSCin
may be driven by a single ended clock, up to 200 MHz, instead of a crystal. Refer to
may be driven by a single ended clock, up to 200 MHz, instead of a crystal. Refer to
for more
information. If Crystal mode is selected and the pins do not have an AC signal applied to them,
will be
the state of the outputs. If Crystal mode is selected an open state is not allowed on OSCin, as the outputs may
oscillate due to the crystal oscillator circuitry.
oscillate due to the crystal oscillator circuitry.
Table 3. OSCin Input vs. Output States
OSCin
Output State
Open
Not Allowed
Logic Low
Logic High
Logic High
Logic Low
CLOCK OUTPUTS
The LMK00105 has 5 LVCMOS outputs.
Output Enable Pin
When the output enable pin is held High, the outputs are enabled. When it is held Low, the outputs are held in a
Low state as shown in
Low state as shown in
Table 4. Output Enable Pin States
OE
Outputs
Low
Disabled (Hi-Z)
High
Enabled
The OE pin is synchronized to the input clock to ensure that there are no runt pulses. When OE is changed from
Low to High, the outputs will initially have an impedance of about 400
Low to High, the outputs will initially have an impedance of about 400
Ω
to ground until the second falling edge of
the input clock and starting with the second falling edge of the input clock, the outputs will buffer the input. If the
OE pin is taken from Low to High when there is no input clock present, the outputs will either go high or low and
stay a that state; they will not oscillate. When the OE pin is taken from High to Low the outputs will be Low after
the second falling edge of the clock input and then will go to a Disabled (Hi-Z) state starting after the next rising
edge.
OE pin is taken from Low to High when there is no input clock present, the outputs will either go high or low and
stay a that state; they will not oscillate. When the OE pin is taken from High to Low the outputs will be Low after
the second falling edge of the clock input and then will go to a Disabled (Hi-Z) state starting after the next rising
edge.
Using Less than Five Outputs
Although the LMK00105 has 5 outputs, not all applications will require all of these. In this case, the unused
outputs should be left floating with a minimum copper length to minimize capacitance. In this way, this output will
consume minimal output current because it has no load.
outputs should be left floating with a minimum copper length to minimize capacitance. In this way, this output will
consume minimal output current because it has no load.
NOTE
For best soldering practices, the minimum trace length should extend to include the pin
solder mask. This way during reflow, the solder has the same copper area as connected
pins. This allows for good, uniform fillet solder joints helping to keep the IC level during
reflow.
solder mask. This way during reflow, the solder has the same copper area as connected
pins. This allows for good, uniform fillet solder joints helping to keep the IC level during
reflow.
Copyright © 2012–2013, Texas Instruments Incorporated
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