Texas Instruments DAC8564EVM - DAC8564 Evaluation Module DAC8564EVM DAC8564EVM Datenbogen

Produktcode
DAC8564EVM
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ti
12500 TI Boulevard.  Dallas, Texas 75243
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REV:
10-Feb-2008
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Revision History
REV
ECN Number
Approved
DAC8564 Rev A.Sch
DOCUMENTCONTROL #
DAC8564/65 EVM
A
J. PARGUIAN
1
VCC = +15V Analog
AVDD = +2.7V to +5.5V Analog
VSS = 0V to -15V Analog
EDGE Numbers:
DAC8564EVM BOM  = 6496403 
DAC8565EVM BOM  = 6496404 
DAC8564/65EVM PWB  = 6496405 
DAC8564/65EVM DDB (BLOCK)  = 6496406 
DAC8564/65EVM PCA  = 6496407 
DAC8564EVM KIT (BLOCK)  = 6496408 
DAC8565EVM KIT (BLOCK)  = 6496409 
DAC8564EVM SFT  = 6496410 
DAC8565EVM SFT  = 6496411 
1
First Proto Release
JLP
J. PARGUIAN
6496406
1
+5VA
SCLK
VSS
2
3
6
4
7
1
5
U2
OPA627AU
VCC
VCC
EXTERNAL
REFERENCE
1
2
3
R15
100K
1
2
3
R10 20K
VDD
VrefH
ENABLE
+REFin
+REFin
SDI
SCLK
SDI
IOVDD
-REFin
OUT_A
OUT_B
OUT_C
OUT_D
2
3
1
8
4
U4A
OPA2132UA
5
6
7
U4B
OPA2132UA
-REFin
VrefH
Vr
ef
H
VCC
U2_+IN
U2_-IN
U2_OUT
VrefL
VrefL
NOTE:  Voltage range of -REFin input should not exceed 0 -
V fH
VCC
VSS
+5VA
-5VA
VDD
+3.3VD+1.8VD
+3.3VA
LDAC
SYNC
LDAC
ENABLE
A1/RSTSEL
A0/RST
A1/RSTSEL
A0/RST
SYNC
+3.3VA
AVDD
-VA
2
-5VA
4
AGND
6
VD1
8
+5VD
10
+VA
1
+5VA
3
DGND
5
+1.8VD
7
+3.3VD
9
J3A
DAUGHTER-POWER
A0(+)
2
A1(+)
4
A2(+)
6
A3(+)
8
A4
10
A5
12
A6
14
A7
16
REF-
18
REF+
20
A0(-)
1
A1(-)
3
A2(-)
5
A3(-)
7
AGND
9
AGND
11
AGND
13
VCOM
15
AGND
17
AGND
19
J4A
OUTPUT HEADER
GPIO0
2
DGND
4
GPIO1
6
GPIO2
8
DGND
10
GPIO3
12
GPIO4
14
SCL
16
DGND
18
SDA
20
CNTL
1
CLKX
3
CLKR
5
FSX
7
FSR
9
DX
11
DR
13
INT
15
TOUT
17
GPIO5
19
J2A
DAUGHTER-SERIAL
R1
10K
R2
10K
R3
10K
R4
10K
R5
DNP
R6
DNP
C5
0.1uF
C2
10uF
1
2
3
JMP7
C7
0.1uF
C3
10uF
R11
0
R12
0
1
2
JMP2
1
2
JMP1
1
2
JMP4
1
2
JMP3
VIN
2
VOUT
6
TRIM
5
GND
4
TEMP
3
U3
REF02AU
C1
10uF
C4
0.1uF
TP1
EX_REF_OUT
R13
0
R16
20k
C6
0.1uF
1
2
3
JMP8
1
2
3
JMP9
TP4
AGND
TP3
TP2
TP5
+Vin
TP6
-Vin
R18
DNP
R21
DNP
R19 DNP
R20 DNP
R22
DNP
R23
DNP
R17
DNP
C9
DNP
C8
DNP
R14
0
R7
10K
R9
10K
R8
10K
R24
100
C11
1uF
C10
1uF
C12
1nF
1
2
JMP5
1
2
JMP6
1
2
3
JMP10
1
2
3
JMP15
OPA IN
1
2
3
JMP16
OPA OUT
1
2
3
JMP11
OUT A
1
2
3
JMP12
OUT B
1
2
3
JMP13
OUT C
1
2
3
JMP14
OUT D
J4A (TOP) = SAM_TSM-110-01-L-DV-P
J4B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
J2A (TOP) = SAM_TSM-110-01-L-DV-P
J2B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
J3A (TOP) = SAM_TSM-105-01-L-DV-P
J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
VoutB
2
IO_V/DVDD
12
LDAC
16
A1/RSTSEL
14
GND
6
VrefH
3
VrefL
5
VoutA
1
ENABLE
15
A0/RST
13
VoutD
8
Din
11
SCLK
10
SYNC
9
AVDD
4
VoutC
7
U1
DAC8564/65
R25
DNP
C14
DNP
C13
100pF
Typically 1µF
Typically 10k
TP7
TP8
INT_REF_OUT
TP9
AGND
VDD = +2.7V to +5.5V Digital
Note: VrefH jumper, JMP8, is no connect by default (U1 uses
 internal reference on power up)
A
Production Release
JLP
1
2
3
JMP17
+3.3VD
1
2
3
JMP18
IOVDD
OPA211