Texas Instruments TMS320C6472 Evaluation Module TMDSEVM6472LE TMDSEVM6472LE Datenbogen
Produktcode
TMDSEVM6472LE
PRODUCTPREVIEW
SPRS612G
–
JUNE 2009
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REVISED JULY 2011
7.9.3.6
PLL2 PLLDIV Ratio Change Status Register (DCHANGE)
Whenever a different ratio is written to the PLLDIVn registers, the PLLCTRL flags the change in the
PLLDIV ratio change status registers (DCHANGE). During the GO operation, the PLL controller will only
change the divide ratio of the SYSCLKs with the bit set in DCHANGE. Note that changed clocks will be
automatically aligned to other clocks. The PLLDIV divider ratio change status register is shown in
PLLDIV ratio change status registers (DCHANGE). During the GO operation, the PLL controller will only
change the divide ratio of the SYSCLKs with the bit set in DCHANGE. Note that changed clocks will be
automatically aligned to other clocks. The PLLDIV divider ratio change status register is shown in
and described in
31
16
Reserved
R-0
15
6
5
4
3
2
1
0
Reserved
SYSCLK18
SYSCLK17
SYSCLK16
SYSCLK15
SYSCLK14
SYSCLK13
R-0
R-0
R-0
R-0
R-0
R-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 7-31. PLLDIV Divider Ratio Change Status Register (DCHANGE)
Table 7-40. PLLDIV Divider Ratio Change Status Register (DCHANGE) Field Descriptions
Bit
Field
Value
Description
31:6
Reserved
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
5
SYSCLK18
Identifies when the SYSCLK18 divide ratio has been modified.
0
SYSCLK18 ratio has not been modified. When GOSET is set, SYSCLK18 will not be affected.
1
SYSCLK18 ratio has been modified. When GOSET is set, SYSCLK18 will change to the new ratio.
4
SYSCLK17
Identifies when the SYSCLK17 divide ratio has been modified.
0
SYSCLK17 ratio has not been modified. When GOSET is set, SYSCLK17 will not be affected.
1
SYSCLK17 ratio has been modified. When GOSET is set, SYSCLK17 will change to the new ratio.
3
SYSCLK16
Identifies when the SYSCLK16 divide ratio has been modified.
0
SYSCLK16 ratio has not been modified. When GOSET is set, SYSCLK16 will not be affected.
1
SYSCLK16 ratio has been modified. When GOSET is set, SYSCLK16 will change to the new ratio.
2
SYSCLK15
Identifies when the SYSCLK15 divide ratio has been modified.
0
SYSCLK15 ratio has not been modified. When GOSET is set, SYSCLK15 will not be affected.
1
SYSCLK15 ratio has been modified. When GOSET is set, SYSCLK15 will change to the new ratio.
1
SYSCLK14
Identifies when the SYSCLK14 divide ratio has been modified.
0
SYSCLK14 ratio has not been modified. When GOSET is set, SYSCLK14 will not be affected.
1
SYSCLK14 ratio has been modified. When GOSET is set, SYSCLK14 will change to the new ratio.
0
SYSCLK13
Identifies when the SYSCLK13 divide ratio has been modified.
0
SYSCLK13 ratio has not been modified. When GOSET is set, SYSCLK13 will not be affected.
1
SYSCLK13 ratio has been modified. When GOSET is set, SYSCLK13 will change to the new ratio.
Copyright
©
2009
–
2011, Texas Instruments Incorporated
C64x+ Peripheral Information and Electrical Specifications
169
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