Texas Instruments THS7372 Evaluation Module THS7372PWEVM THS7372PWEVM Datenbogen
Produktcode
THS7372PWEVM
SBOS578
–
AUGUST 2011
ELECTRICAL CHARACTERISTICS: V
S+
= +3.3 V (continued)
At T
A
= +25
°
C, R
L
= 150
Ω
to GND, and dc-coupled input/output, unless otherwise noted.
THS7372
TEST
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
LEVEL
(1)
DC PERFORMANCE
V
IN
= 0 V, SD channel
200
305
400
mV
A
Biased output voltage
V
IN
= 0 V, FHD channels
200
300
400
mV
A
Input voltage range
DC input, limited by output
–
0.1/1.46
V
C
V
IN
=
–
0.1 V, SD channel
140
200
μ
A
A
Sync-tip clamp charge current
V
IN
=
–
0.1 V, FHD channels
280
400
μ
A
A
Input impedance
800 || 2
k
Ω
|| pF
C
OUTPUT CHARACTERISTICS
R
L
= 150
Ω
to +1.65 V
3.15
V
C
R
L
= 150
Ω
to GND
2.85
3.1
V
A
High output voltage swing
R
L
= 75
Ω
to +1.65 V
3.1
V
C
R
L
= 75
Ω
to GND
3
V
C
R
L
= 150
Ω
to +1.65 V (V
IN
=
–
0.2 V)
0.06
V
C
R
L
= 150
Ω
to GND (V
IN
=
–
0.2 V)
0.05
0.12
V
A
Low output voltage swing
R
L
= 75
Ω
to +1.65 V (V
IN
=
–
0.2 V)
0.1
V
C
R
L
= 75
Ω
to GND (V
IN
=
–
0.2 V)
0.05
V
C
Output current (sourcing)
R
L
= 10
Ω
to +1.65 V
80
mA
C
Output current (sinking)
R
L
= 10
Ω
to +1.65 V
70
mA
C
POWER SUPPLY
Operating voltage
2.6
3.3
5.5
V
B
V
IN
= 0 V, all channels on
18.8
23.4
28.5
mA
A
V
IN
= 0 V, SD channel on, FHD channels off
5.6
6.9
9
mA
A
Total quiescent current, no load
V
IN
= 0 V, SD channel off, FHD channels on
13.2
16.5
19.5
mA
A
V
IN
= 0 V, all channels off, V
DISABLE
= 3 V
0.1
10
μ
A
A
Power-supply rejection ratio
At dc
52
dB
C
(PSRR)
LOGIC CHARACTERISTICS
(3)
V
IH
Disabled
1.6
1.4
V
A
V
IL
Enabled
0.75
0.6
V
A
I
IH
Applied voltage = 3.3 V
1
μ
A
C
I
IL
Applied voltage = 0 V
1
μ
A
C
Disable time
200
ns
C
Enable time
250
ns
C
(3)
The logic input pins default to a logic
'
0
'
condition when left floating.
4
Copyright
©
2011, Texas Instruments Incorporated