Texas Instruments 180 to 100 Pin DIMM Adapter TMDSADAP180TO100 TMDSADAP180TO100 Datenbogen

SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014

Without input qualification

3t

c(OSCCLK)

Pulse duration, external

t

w(WAKE-INT)

cycles

wake-up signal

With input qualification

(1)

(2 + QUALSTDBY) * t

c(OSCCLK)

(1)

QUALSTDBY is a 6-bit field in the LPMCR0 register.

over recommended operating conditions (unless otherwise noted)

Delay time, IDLE instruction executed

t

d(IDLE-XCOL)

32t

c(SCO)

45t

c(SCO)

cycles

to XCLKOUT low

Delay time, external wake signal to

t

d(WAKE-STBY)

cycles

program execution resume

(1)

Without input qualifier

100t

c(SCO)

•

Wake up from flash

cycles

–

Flash module in active state

With input qualifier

100t

c(SCO)

+ t

w(WAKE-INT)

Without input qualifier

1125t

c(SCO)

•

Wake up from flash

cycles

–

Flash module in sleep state

With input qualifier

1125t

c(SCO)

+ t

w(WAKE-INT)

Without input qualifier

100t

c(SCO)

cycles

•

Wake up from SARAM

With input qualifier

100t

c(SCO)

+ t

w(WAKE-INT)

(1)

This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered
by the wake up signal) involves additional latency.

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