Texas Instruments 180 to 100 Pin DIMM Adapter TMDSADAP180TO100 TMDSADAP180TO100 Datenbogen
Produktcode
TMDSADAP180TO100
Settling T
ime (ns)
0
100
200
300
400
500
600
700
800
900
1000
1100
0
50
100
150
200
250
300
350
400
450
500
DAC Step Size (Codes)
15 Codes
7 Codes
3 Codes
1 Code
DAC Accuracy
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
7.1.2.1
On-Chip Comparator and DAC Electrical Data and Timing
Table 7-3. Electrical Characteristics of the Comparator/DAC
over recommended operating conditions (unless otherwise noted)
CHARACTERISTIC
MIN
TYP
MAX
UNITS
Comparator
Comparator Input Range
V
SSA
– V
DDA
V
Comparator response time to PWM Trip Zone (Async)
30
ns
Input Offset
±5
mV
Input Hysteresis
(1)
35
mV
DAC
DAC Output Range
V
SSA
– V
DDA
V
DAC resolution
10
bits
DAC settling time
See
DAC Gain
–1.5
%
DAC Offset
10
mV
Monotonic
Yes
INL
±3
LSB
(1)
Hysteresis on the comparator inputs is achieved with a Schmidt trigger configuration. This results in an effective 100-k
Ω feedback
resistance between the output of the comparator and the non-inverting input of the comparator.
Figure 7-5. DAC Settling Time
160
Peripheral Information and Timings
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