Texas Instruments LM48556TLBD Evaluation Module LM48556TLBD LM48556TLBD Datenbogen

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LM48556TLBD
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SNAS452B – JUNE 2008 – REVISED MAY 2013
Figure 3. 12 Bump DSBGA - Package View
BUMP DESCRIPTIONS
Bump
Name
Description
A1
OUT-
Amplifier Inverting Output
A2
SV
DD
Signal Power Supply - Positive
A3
IN+
Amplifier Non-inverting Input
B1
SV
SS
Signal Power Supply - Negative
B2
OUT+
Amplifier Non-inverting Output
B3
IN-
Amplifier Inverting Input
C1
CPV
SS
Charge Pump Output Voltage
C2
C1P
Charge Pump Flying Capacitor Positive Terminal
Active Low Reset Input. Connect to V
DD
for normal operation. Drive SD
C3
SD
low to disable.
D1
C1N
Charge Pump Flying Capacitor Negative Terminal
D2
PGND
Power Ground
D3
PV
DD
Power Supply
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