Texas Instruments DAC8806EVM Evaluation Module DAC8806EVM DAC8806EVM Datenbogen
Produktcode
DAC8806EVM
www.ti.com
3.1
Parallel Control
3.2
Parallel Data
4
Power Supplies
Power Supplies
Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin,
dual-row, header/socket combination at J6. This header/socket provides access to the digital control pins
of the EVM. Consult Samtec at
dual-row, header/socket combination at J6. This header/socket provides access to the digital control pins
of the EVM. Consult Samtec at
or 1-800-SAMTEC-9 for a variety of mating connector
options.
Pin Number
Signal
Description
J6.1
DC_CSa
Daughter Card Chip Select – active-low signal used to access the EVM via U8
J6.3
WR
Write Strobe – not used on this EVM.
J6.5
RD
Read Strobe – not used on this EVM.
J6.7
EVM_A0
EVM Address line 0 – used with U8 to control RST and WR
J6.9
EVM_A1
EVM Address line 1 – used with U8 to control RST and WR
J6.11
EVM_A2
EVM Address line 2 – used with U8 to control RST and WR
J6.13
EVM_A3
EVM Address line 3 – not used on this EVM.
J6.15
EVM_A4
EVM Address line 4 – not used on this EVM.
J6.17
TOUT
Timer Output – not used on this EVM.
J6.19
INT
Interrupt Output – not used on this EVM
Jumpers W5 and W6 control the signal applied to the active-low RST and WR pins, respectively, on the
DAC8820 or DAC8806. The absolute address for the installed DAC depends on several factors. When
used with the 5-6K Interface Board, the physical address depends on the DSP in use as well as the
location of W1 on the 5-6K Interface Board. See the 5-6K Interface Board User's Guide (
DAC8820 or DAC8806. The absolute address for the installed DAC depends on several factors. When
used with the 5-6K Interface Board, the physical address depends on the DSP in use as well as the
location of W1 on the 5-6K Interface Board. See the 5-6K Interface Board User's Guide (
) and
your DSK schematics for details.
When used in combination with U8, an SN74LVC138 address decoder, jumpers W5 and W6 allow the
RST and WR signals to be controlled by one of three different addresses. Having the ability to select the
address location of the DAC inputs provides the possibility of stacking additional parallel ADC or DAC
boards together with the DAC8806/20EVM.
RST and WR signals to be controlled by one of three different addresses. Having the ability to select the
address location of the DAC inputs provides the possibility of stacking additional parallel ADC or DAC
boards together with the DAC8806/20EVM.
The Y1, Y2, and Y3 outputs of the address decoder are connected to the DAC Reset pin via jumper W6.
The RST pin is active when accessed through address locations 0x01, 0x02, or 0x03. Address 0x02 is the
default condition on the EVM.
The RST pin is active when accessed through address locations 0x01, 0x02, or 0x03. Address 0x02 is the
default condition on the EVM.
The Load DAC (LDAC) pin is connected via jumper W4 to either the Y4 output of the address decoder U8
(default) or the applied WR strobe. When using the LDAC controlled by U8, multiple DAC boards can be
stacked together, allowing a single LDAC access to update up to three devices simultaneously. LDAC
corresponds to address 0x04.
(default) or the applied WR strobe. When using the LDAC controlled by U8, multiple DAC boards can be
stacked together, allowing a single LDAC access to update up to three devices simultaneously. LDAC
corresponds to address 0x04.
The Y5, Y6, and Y7 outputs of the address decoder are connected to the DAC Write pin via jumper W5.
The WR pin is active when accessed through address locations 0x05, 0x06, or 0x07. Address 0x06 is the
default condition on the EVM.
The WR pin is active when accessed through address locations 0x05, 0x06, or 0x07. Address 0x06 is the
default condition on the EVM.
The modular DAC8806/20EVM uses Samtec part numbers SSW-116-22-F-D-VS-K and
TSM-116-01-T-DV-P provide a convenient 16-pin, dual-row, header/socket combination at J7. This
header/socket combination provides access to the parallel data pins of the installed DAC. Data line D0 is
connected to J7 pin 1. Data lines 1-15 are located on pins 3-31, respectively. Even-numbered pins 2-32
are connected to digital ground. There are no internal connections for D14 and D15 on the DAC8806.
TSM-116-01-T-DV-P provide a convenient 16-pin, dual-row, header/socket combination at J7. This
header/socket combination provides access to the parallel data pins of the installed DAC. Data line D0 is
connected to J7 pin 1. Data lines 1-15 are located on pins 3-31, respectively. Even-numbered pins 2-32
are connected to digital ground. There are no internal connections for D14 and D15 on the DAC8806.
The DAC8806/20EVM board requires a power supply of +2.7 VDC to +5 VDC. Because the EVM is
designed to work with the 5-6K Interface Board, J5 provides direct connection to the common power bus
described in document
designed to work with the 5-6K Interface Board, J5 provides direct connection to the common power bus
described in document
. When used with the 5-6K Interface Board, power to the installed DAC is
controlled by the shunt jumper on W3. The shunt can be placed on W3 pins 1-2 for 5-V operation or 2-3
for 3.3-V operation. The factory default (W3 closed pins 1-2) is 5-V operation.
for 3.3-V operation. The factory default (W3 closed pins 1-2) is 5-V operation.
shows the pinout of
J5.
SLAU190A – February 2006 – Revised May 2007
DAC8806/20EVM
3